DS1302IDRG from HANSCHIP semiconductor, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VCC2	power_in	Primary power supply input (main supply). Operating range 2.0 V to 5.5 V. Feeds the trickle-charge circuit that can charge a backup cell/cap on VCC1.
2	X1	passive	Connection for a 32.768 kHz crystal oscillator (one terminal). Recommended crystal load capacitance CX = 6 pF typical.
3	X2	passive	Connection for a 32.768 kHz crystal oscillator (other terminal). Pair with X1 across the crystal; CX ≈ 6 pF.
4	GND	power_in	Device ground reference (0 V).
5	RST	input	Reset / chip enable input, active high. Drive high to initiate a data transfer; drive low to terminate a transfer and place I/O into a high-impedance state. Must be low at power-up until VCC ≥ 2.5 V; when driving RST high, SCLK must be at logic 0.
6	I/O	bidirectional	Serial data input/output for the 3-wire interface. Command/data bits are clocked in on rising SCLK edges and read data is clocked out on falling SCLK edges. Goes high-impedance when RST is low. TTL-compatible at VCC = 5 V.
7	SCLK	input	Serial clock input for the 3-wire interface. Synchronizes shifting of command and data bytes on the I/O pin. Maximum clock rate 0.5 MHz at VCC = 2.5 V, 2.0 MHz at VCC = 5 V.
8	VCC1	power_in	Backup power supply input (typically a Ni-Cd cell or supercap). Powers the RTC and RAM when VCC2 is absent; can be trickle-charged from VCC2 through selectable diode/resistor combinations (R1=2 kΩ, R2=4 kΩ, R3=8 kΩ; VTD ≈ 0.7 V).

Key specifications

Parameter	Value
Manufacturer	HANSCHIP semiconductor
Package	SOP-8
Category	RTC
Pins	8

Ordering variants

Same part, different packaging or reel option.

DS1302CDRG
DS1302IDRG
DS1302CDRG4
DS1302IDRG4
DS1302CPG
DS1302IPG
DS1302CDGKRG
DS1302IDGKRG

CAD (KiCad official)

Symbol: DS1302IDRG
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOP-8 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`ds1302idrg.step`	122 KB	You want the bare part, or you mark your own boards.
`ds1302idrg-etched.step`	2.3 MB	You want the part with `DS1302IDRG` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 564 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: HANSCHIP semiconductor datasheet (15 pp, sha256 6dfca75d1e1627dd, retrieved 2026-08-17, tier: lcsc)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF