SN65HVD73DGS from Texas Instruments, in a VSSOP-10-0.5mm. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	R	output	Receive data output of the receiver.
2	RE	input	Receive enable input, active low.
3	DE	input	Driver enable input, active high.
4	D	input	Driver data input.
5	GND	power_in	Local device ground, the reference potential for the device.
6	Y	output	Digital bus output Y, complementary to Z.
7	Z	output	Digital bus output Z, complementary to Y.
8	B	input	Digital bus input B, complementary to A.
9	A	input	Digital bus input A, complementary to B.
10	VCC	power_in	Supply voltage of 3 V to 3.6 V (3.3 V nominal).

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	VSSOP-10-0.5mm
Category	Interface
Pins	10

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Supply voltage	VCC	-0.5		5	V	over operating free-air temperature range	7
Voltage range at any bus pin (A, B, Y, or Z)		-13		16.5	V		7
Voltage range at any logic pin (D, DE, or RE)		-0.3		5.7	V		7
Voltage input range, transient pulse, any bus pin (A, B, Y, or Z)		-100		100	V	through 100 Ω	7
Output current receiver output		-24		24	mA		7
Junction temperature	TJ			170	°C		7
Storage temperature range	Tstg	-65		150	°C		7
Supply voltage	VCC	3	3.3	3.6	V		7
Input voltage at any bus pin (separately or common mode)	VI	-7		12	V		7
High-level input voltage (Driver, driver enable, and receiver enable inputs)	VIH	2			V	max printed as VCC	7
Low-level input voltage (Driver, driver enable, and receiver enable inputs)	VIL	0		0.8	V		7
Differential input voltage	VID	-12		12	V		7
Output current, Driver	IO	-60		60	mA		7
Output current, Receiver	IO	-8		8	mA		7
Differential load resistance	RL	54	60		Ω		7
Operating free-air temperature	TA	-40		125	°C		7
Junction temperature	TJ	-40		150	°C		7
Driver differential output voltage magnitude	/VOD/	1.5		2	V	RL = 60 Ω, 375 Ω on each output to -7 V to 12 V	8
Driver differential output voltage magnitude	/VOD/	2			V	RL = 100 Ω (RS-422) TJ ≥ 0°C, VCC ≥ 3.2 V	8
Change in magnitude of driver differential output voltage	Δ/VOD/	-50	0	50	mV	RL = 54 Ω, CL = 50 pF	8
Steady-state common-mode output voltage	VOC(SS)	1		3	V	Center of two 27-Ω load resistors	8
Change in differential driver output common-mode voltage	ΔVOC	-50	0	50	mV		8
Peak-to-peak driver common-mode output voltage	VOC(PP)			500	mV		8
Positive-going receiver differential input voltage threshold	VIT+	-70		-20	mV	See (1)	8
Negative-going receiver differential input voltage threshold	VIT-	-200		-140	mV	See (1)	8
Receiver differential input voltage threshold hysteresis (VIT+, VIT-)	Vhys	40	70		mV		8
Receiver high-level output voltage	VOH	2.4			V	IOH = -8 mA; max printed as VCC-0.3	9
Receiver low-level output voltage	VOL		0.2	0.4	V	IOL = 8 mA	9
Driver input, driver enable, and receiver enable input current	II	-3		3	µA		9
Receiver output high-impedance current	IOZ	-1		1	µA	HVD70, HVD73, HVD76 VO = 0 V or VCC, RE = VCC	9
Driver short-circuit output current	IOS	-150		150	mA		9
Bus input current (disabled driver) HVD70, HVD73	II	75		125	µA	VCC = 0 to ROC (max), DE = GND, VI = 12 V	9
Bus input current (disabled driver) HVD70, HVD73	II	-100		-40	µA	VCC = 0 to ROC (max), DE = GND, VI = -7 V	9
Supply current (quiescent) driver and receiver enabled	ICC		750	1100	µA	DE = VCC, RE = GND, No load	9
Supply current (quiescent) driver enabled, receiver disabled	ICC		350	650	µA	DE = VCC, RE = VCC, No load	9
Supply current (quiescent) driver disabled, receiver enabled	ICC		650	800	µA	DE = GND, RE = GND, No load	9
Supply current (quiescent) driver and receiver disabled	ICC		0.1	5	µA	DE = GND, D = open, RE = VCC, No load	9
Driver differential output rise/fall time	tr, tf	4	7	14	ns	20 Mbps; RL = 54 Ω, CL = 50 pF	10
Driver propagation delay	tPHL, tPLH	4	10	20	ns	20 Mbps	10
Driver pulse skew	tSK(P)		0	4	ns	20 Mbps; /tPHL, tPLH/	10
Driver disable time HVD73	tPHZ, tPLZ		12	25	ns	20 Mbps; See Figure 18 and Figure 19	10
Driver enable time	tPZH, tPZL		10	20	ns	Receiver enabled	10
Driver enable time	tPZH, tPZL		3	8	µs	Receiver disabled	10
Receiver output rise/fall time	tr, tf		5	10	ns	CL = 15 pF; See Figure 20	10
Receiver propagation delay time	tPHL, tPLH		60	90	ns	20 Mbps	10
Receiver pulse skew	tSK(P)		0	5	ns	/tPHL, tPLH/	10
Receiver disable time HVD73	tPLZ, tPHZ		17	25	ns		10
Receiver enable time	tPZL(1), tPZH(1)		12	90	ns	Driver enabled; See Figure 21	10
Receiver enable time	tPZL(2), tPZH(2)		3	8	µs	Driver disabled; See Figure 22	10
Differential output capacitance	COD		15		pF		8
Thermal shut-down junction temperature	Tsd		170		°C		9
Junction-to-ambient thermal resistance DGS (10 pins)	RθJA		165.5		°C/W		8
Junction-to-case (top) thermal resistance DGS (10 pins)	RθJC(top)		37.7		°C/W		8
Junction-to-board thermal resistance DGS (10 pins)	RθJB		86.4		°C/W		8
Junction-to-top characterization parameter DGS (10 pins)	ψJT		1.4		°C/W		8
Junction-to-board characterization parameter DGS (10 pins)	ψJB		84.8		°C/W		8

CAD (KiCad official)

Symbol: SN65HVD73DGS
Footprint: Package_SO:MSOP-10_3x3mm_P0.5mm
3D model: VSSOP-10-0.5mm (KiCad packages3D, STEP)
3D model files: sn65hvd73dgs-etched.step / sn65hvd73dgs-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn65hvd73dgs.step / sn65hvd73dgs.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (49 pp, sha256 86f57997ef2a3eb6, retrieved 2026-11-05, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

SN65HVD73DGS

Verified SN65HVD73DGS

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3D Model

Symbol & Footprint

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