RS706-3.08YK
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Jiangsu RUNIC Tech RS706 3 08YK Supervisor and Reset ICs, SOIC-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
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markdownRS706-3.08YK
Jiangsu RUNIC Tech · Supervisor and Reset ICs · SOIC-8
RS706-3.08YK from Jiangsu RUNIC Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | MR | input | Active-low Manual-Reset input. Triggers a reset pulse when pulled below 0.8V (at Vcc=5V). Has an internal 20k/52k/120k pull-up resistor and can be driven from TTL/CMOS logic or shorted to GND with a pushbutton switch. |
| 2 | VCC | power_in | Power supply voltage that is monitored. Operating range 1.0V to 5.5V. Absolute max 6.0V. |
| 3 | GND | power_in | Ground reference for all signals. |
| 4 | PFI | input | Power-Fail Voltage Monitor Input. When PFI drops below the 1.2V (typ) threshold, PFO goes low. Tie to GND or VCC if unused. Input current ~0.01nA typ. |
| 5 | PFO | output | Active-low Power-Fail Output. Sinks current (VOL<=0.4V at 1.2mA) when PFI is below 1.2V; otherwise stays high (VOH>=0.7*VCC at 800uA source). |
| 6 | WDI | input | Watchdog Input. If WDI remains high or low for 1.6s (typ), the internal watchdog timer runs out and WDO goes low. Floating or high-impedance WDI disables the watchdog. Watchdog clears on any WDI rising or falling edge, three-state, or reset assertion. Min pulse width 16ns. |
| 7 | RESET | output | Active-low Reset Output. Pulses low for 160ms (typ) when triggered and stays low whenever VCC is below the 3.08V reset threshold. Remains low for 160ms after VCC rises above the threshold or MR is released. VOH>=0.7*VCC at 500uA source; VOL<=0.4V at 1.2mA sink. |
| 8 | WDO | output | Active-low Watchdog Output. Pulls low when the internal watchdog timer expires and stays low until the watchdog is cleared. Also goes low during low-line conditions (VCC below reset threshold). WDO has no minimum pulse width and returns high with no delay once VCC rises above the reset threshold. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Jiangsu RUNIC Tech |
| Package | SOIC-8 |
| Category | PMIC |
| Pins | 8 |
Ordering variants
Same part, different packaging or reel option.
RS706-2.63YKRS706-2.93YKRS706-3.08YKRS706-4.00YK
CAD (KiCad official)
- Symbol:
RS706-3.08YK - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
rs706-3-08yk-etched.step/rs706-3-08yk-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);rs706-3-08yk.step/rs706-3-08yk.glbare the bare package body.
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
rs706-3-08yk.step |
122 KB | You want the bare part, or you mark your own boards. |
rs706-3-08yk-etched.step |
2.6 MB | You want the part with RS706-3.08YK already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 621 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Jiangsu RUNIC Tech datasheet (17 pp, sha256
147553e34d4207a2, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).