component
RS9N50D
Public Made by Adomby adom
REASUNOS MOSFETs, TO-252. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownRS9N50D
REASUNOS · MOSFETs · TO-252
RS9N50D from REASUNOS, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate; drive with VGS up to ±30 V maximum, threshold 3 to 4 V at ID=250µA. |
| 2 | D | passive | Drain (middle lead and the exposed tab); VDSS 500 V, continuous drain current 9 A at TC=25℃, pulsed 32 A. |
| 3 | S | passive | Source; connected to the body diode anode, continuous source current 9 A. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | REASUNOS |
| Package | TO-252 |
| Category | Transistors/Thyristors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-to-Source Voltage | VDSS | 500 | V | 1 | |||
| Continuous Drain Current | ID | 9 | A | TC=25℃ | 1 | ||
| Pulsed Drain Current | IDM | 32 | A | Note*1 | 1 | ||
| Power Dissipation | PD | 63 | W | 1 | |||
| Gate-to-Source Voltage | VGS | -30 | 30 | V | 1 | ||
| Single Pulse Avalanche Energy | EAS | 180 | mJ | L = 10mH, VDD = 50V, RG = 25Ω | 1 | ||
| Maximum Temperature for Soldering Leads at 1.6mm from case for 10 seconds | TL | 300 | ℃ | 1 | |||
| Maximum Temperature for Soldering Package Body for 10 seconds | TPKG | 260 | ℃ | 1 | |||
| Operating Junction and Storage Temperature Range | TJ and TSTG | -55 | 150 | ℃ | 1 | ||
| Junction-to-Case Thermal Resistance | RθJC | 1.98 | ℃/W | Drain lead soldered to water cooled heatsink, PD adjusted for a peak junction temperature of +150℃ | 2 | ||
| Junction-to-Ambient Thermal Resistance | RθJA | 62.5 | ℃/W | 1 cubic foot chamber, free air | 2 | ||
| Drain-to-Source Breakdown Voltage | BVDSS | 500 | V | VGS=0V, ID=250µA | 2 | ||
| Drain-to-Source Leakage Current | IDSS | 1 | µA | VDS=500V, VGS=0V | 2 | ||
| Gate-to-Source Forward Leakage Current | IGSS | 100 | nA | VGS=30V, VDS=0V | 2 | ||
| Gate-to-Source Reverse Leakage Current | IGSS | -100 | nA | VGS=-30V, VDS=0V | 2 | ||
| Static Drain-to-Source On-Resistance | RDS(on) | 0.68 | 0.85 | Ω | VGS=10V, ID=4A | 2 | |
| Gate Threshold Voltage | VGS(TH) | 3 | 4 | V | VGS=VDS, ID=250µA | 2 | |
| Continuous Source Current (integral pn-diode in MOSFET) | IS | 9 | A | 3 | |||
| Maximum Pulsed Current | ISM | 32 | A | 3 | |||
| Diode Forward Voltage | VSD | 1.4 | V | IS=4A, VGS=0V | 3 |
CAD (KiCad official)
- Symbol:
RS9N50D - Footprint:
Package_TO_SOT_SMD:TO-252-2 - 3D model: TO-252 (KiCad packages3D, STEP)
- 3D model files:
rs9n50d-etched.step/rs9n50d-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);rs9n50d.step/rs9n50d.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: REASUNOS datasheet (9 pp, sha256
47707c7dd2360b96, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).