component
RT8250GSP
Public Made by Adomby adom
Richtek Tech DC-DC Converters, SOIC-8-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownRT8250GSP
Richtek Tech · DC-DC Converters · SOIC-8-EP
RT8250GSP from Richtek Tech, in a SOIC-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BOOT | passive | Bootstrap for the high-side gate driver; connect a 10nF or greater ceramic capacitor from BOOT to SW. |
| 2 | VIN | power_in | Voltage supply input with a range of 4.5V to 23V; a suitable large capacitor must be bypassed with this pin. |
| 3 | SW | output | Switching node; connect the output LC filter between SW and the output load. |
| 4 | GND | power_in | Ground. |
| 5 | FB | input | Output voltage feedback input; the feedback reference voltage is 0.925V typically. |
| 6 | COMP | passive | Compensation node for the control loop; a series RC network is required from COMP to GND, with an optional additional capacitor from COMP to GND if needed. |
| 7 | EN | input | Enable input: logic high enables the converter, logic low forces shutdown with supply current below 3μA, and a 100kΩ pull-up to VIN gives automatic startup. |
| 8 | SS | passive | Soft-start control input; a capacitor from SS to GND sets the soft-start period, where 0.1μF gives 13ms typical. |
| 9 | GND | power_in | Exposed pad must be soldered to a large PCB and connected to GND for maximum power dissipation. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Richtek Tech |
| Package | SOIC-8-EP |
| Category | Power Management (PMIC) |
| Pins | 9 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage VIN (absolute maximum) | VIN | -0.3 | 24 | V | 3 | ||
| Other pins voltage (absolute maximum) | -0.3 | 6 | V | Other pins (not VIN, SW, BOOT) | 3 | ||
| Power Dissipation (SOP-8 EP) | PD | 1.333 | W | TA = 25°C | 3 | ||
| Junction Temperature (absolute maximum) | 150 | °C | 3 | ||||
| Lead Temperature (soldering) | 260 | °C | 10 sec soldering | 3 | |||
| Storage Temperature Range | -65 | 150 | °C | 3 | |||
| ESD Susceptibility HBM | 2 | kV | Human Body Model | 3 | |||
| ESD Susceptibility MM | 200 | V | Machine Model | 3 | |||
| Supply Voltage VIN (recommended) | VIN | 4.5 | 23 | V | 3 | ||
| Enable Voltage VEN (recommended) | VEN | 0 | 5.5 | V | 3 | ||
| Junction Temperature Range (recommended) | -40 | 125 | °C | 3 | |||
| Ambient Temperature Range (recommended) | -40 | 85 | °C | 3 | |||
| Shutdown Supply Current | 0.3 | 3 | μA | VEN = 0V | 4 | ||
| Supply Current | 0.7 | 1.2 | mA | VEN = 3 V, VFB = 1V | 4 | ||
| Feedback Voltage | VFB | 0.911 | 0.925 | 0.939 | V | 4.75V ≤ VIN ≤ 23V | 4 |
| Oscillation Frequency | fOSC1 | 300 | 340 | 380 | kHz | 4 | |
| EN Threshold Logic-High Voltage | VIH | 2.7 | V | 4 | |||
| EN Threshold Logic-Low Voltage | VIL | 0.4 | V | 4 | |||
| Input Under Voltage Lockout Threshold (VIN rising) | 3.8 | 4.2 | 4.4 | V | VIN Rising | 4 | |
| Error Amplifier Transconductance | GEA | 1250 | μA/V | ΔIC = ±10μA | 4 | ||
| High-Side Switch On-Resistance | RDS(ON)1 | 100 | mΩ | 4 | |||
| Low-Side Switch On-Resistance | RDS(ON)2 | 85 | mΩ | 4 | |||
| High-Side Switch Leakage Current | 0 | 10 | μA | VEN = 0V, VSW = 0V | 4 | ||
| Upper Switch Current Limit | 5.5 | A | Min. Duty Cycle; VBOOT, VSW = 4.8V | 4 | |||
| Lower Switch Current Limit | 1.4 | A | From Drain to Source | 4 | |||
| COMP to Current Sense Transconductance | GCS | 5.2 | A/V | 4 | |||
| Short Circuit Oscillation Frequency | fOSC2 | 110 | kHz | VFB = 0V | 4 | ||
| Maximum Duty Cycle | DMAX | 90 | % | VFB = 0.8V | 4 | ||
| Minimum On Time | tON | 200 | ns | 4 | |||
| Input Under Voltage Lockout Threshold Hysteresis | 200 | mV | 4 | ||||
| Soft-Start Current | 7 | μA | VSS = 0V | 4 | |||
| Soft-Start Period | 13 | ms | CSS = 0.1μF | 4 | |||
| Thermal Shutdown | TSD | 150 | °C | 4 | |||
| Package Thermal Resistance Junction-to-Ambient | θJA | 75 | °C/W | SOP-8 (Exposed Pad), JEDEC 51-7 four-layer board | 3 | ||
| Package Thermal Resistance Junction-to-Case | θJC | 15 | °C/W | SOP-8 (Exposed Pad), case on exposed pad | 3 |
CAD (KiCad official)
- Symbol:
RT8250GSP - Footprint:
Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm - 3D model: SOIC-8-EP (KiCad packages3D, STEP)
- 3D model files:
rt8250gsp-etched.step/rt8250gsp-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);rt8250gsp.step/rt8250gsp.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Richtek Tech datasheet (12 pp, sha256
35ab74be7247138a, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).