PIC16F1823-I from Microchip, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VDD	power_in	Positive supply. 1.8V-5.5V for PIC16F1823, 1.8V-3.6V for PIC16LF1823. Decouple with a 0.1 µF ceramic to VSS at the pin.
2	RA5/T1CKI/T1OSI/OSC1/CLKIN	bidirectional	GPIO PORTA bit 5. Multiplexed with Timer1 clock input (T1CKI), Timer1 oscillator input (T1OSI), primary oscillator input (OSC1), and external clock input (CLKIN). Programmable weak pull-up. IOC (interrupt-on-change) capable.
3	RA4/AN3/CPS3/T1G/T1OSO/OSC2/CLKOUT/CLKR/SDO	bidirectional	GPIO PORTA bit 4. Muxed with ADC channel AN3, CapSense CPS3, Timer1 gate (T1G), Timer1 oscillator output (T1OSO), primary oscillator output (OSC2), FOSC/4 clock output (CLKOUT), reference clock (CLKR), and MSSP SPI SDO. IOC and weak pull-up capable.
4	RA3/T1G/MCLR/VPP/SS	input	Input-only PORTA bit 3. Muxed with Timer1 gate (T1G), master clear reset (MCLR, active low), high-voltage programming supply (VPP), and MSSP SPI slave select (SS). IOC capable, programmable weak pull-up. When MCLR enabled by CONFIG this pin acts as active-low reset.
5	RC5/CCP1/P1A/RX/DT/MDCIN2	bidirectional	GPIO PORTC bit 5. Muxed with ECCP capture/compare/PWM (CCP1/P1A), EUSART receive/asynchronous data (RX/DT), and Data Signal Modulator carrier input (MDCIN2). Programmable weak pull-up.
6	RC4/C2OUT/SRNQ/P1B/TX/CK/MDOUT	bidirectional	GPIO PORTC bit 4. Muxed with comparator C2 output, SR Latch inverted Q (SRNQ), ECCP PWM output P1B, EUSART transmit/synchronous clock (TX/CK), and Data Signal Modulator output (MDOUT). Programmable weak pull-up.
7	RC3/AN7/CPS7/C12IN3-/P1C/MDMIN	bidirectional	GPIO PORTC bit 3. Muxed with ADC channel AN7, CapSense CPS7, comparator C1/C2 inverting input C12IN3-, ECCP PWM output P1C, and Data Signal Modulator modulator input (MDMIN). Programmable weak pull-up.
8	RC2/AN6/CPS6/C12IN2-/P1D/SDO/MDCIN1	bidirectional	GPIO PORTC bit 2. Muxed with ADC channel AN6, CapSense CPS6, comparator C1/C2 inverting input C12IN2-, ECCP PWM output P1D, MSSP SPI data out (SDO), and Data Signal Modulator carrier input (MDCIN1). Programmable weak pull-up.
9	RC1/AN5/CPS5/C12IN1-/SDA/SDI	bidirectional	GPIO PORTC bit 1. Muxed with ADC channel AN5, CapSense CPS5, comparator C1/C2 inverting input C12IN1-, MSSP I2C data (SDA) and MSSP SPI data in (SDI). Programmable weak pull-up.
10	RC0/AN4/CPS4/C2IN+/SCL/SCK	bidirectional	GPIO PORTC bit 0. Muxed with ADC channel AN4, CapSense CPS4, comparator C2 non-inverting input C2IN+, MSSP I2C clock (SCL) and MSSP SPI clock (SCK). Programmable weak pull-up.
11	RA2/AN2/CPS2/C1OUT/T0CKI/FLT0/INT/SRQ	bidirectional	GPIO PORTA bit 2. Muxed with ADC channel AN2, CapSense CPS2, comparator C1 output, Timer0 clock input (T0CKI), ECCP fault input (FLT0), external interrupt input (INT), and SR Latch Q output (SRQ). IOC capable, programmable weak pull-up.
12	RA1/AN1/VREF+/CPS1/C12IN0-/SRI/ICSPCLK/ICDCLK	bidirectional	GPIO PORTA bit 1. Muxed with ADC channel AN1, ADC/DAC positive reference (VREF+), CapSense CPS1, comparator C1/C2 inverting input C12IN0-, SR Latch Reset input (SRI), and in-circuit programming/debug clock (ICSPCLK/ICDCLK). IOC and weak pull-up capable.
13	RA0/AN0/DACOUT/CPS0/C1IN+/TX/CK/ICSPDAT/ICDDAT	bidirectional	GPIO PORTA bit 0. Muxed with ADC channel AN0, 5-bit DAC output (DACOUT), CapSense CPS0, comparator C1 non-inverting input C1IN+, EUSART TX/CK, and in-circuit programming/debug data (ICSPDAT/ICDDAT). IOC and weak pull-up capable.
14	VSS	power_in	Ground / negative supply reference. Connect to system ground; keep decoupling loop short with VDD.

Key specifications

Parameter	Value
Manufacturer	Microchip
Package	SOIC-14
Category	MCU
Pins	14

Ordering variants

Same part, different packaging or reel option.

PIC16F1823-II/P
PIC16F1823-II/SL
PIC16F1823-II/ST
PIC16F1823-II/ML
PIC16F1823-II/MV

CAD (KiCad official)

Symbol: PIC16F1823-I
Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
3D model: SOIC-14 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`pic16f1823-i.step`	195 KB	You want the bare part, or you mark your own boards.
`pic16f1823-i-etched.step`	2.6 MB	You want the part with `PIC16F1823-I` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 651 faces against 237 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Microchip datasheet (422 pp, sha256 6d6e6d04ac8bd7f6, retrieved 2026-08-17, tier: manufacturer)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF