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Contents

README

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DS8402-50S3

DSTECH · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-3

DS8402-50S3 from DSTECH, in a SOT-23-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground reference pin for the regulator; the input and output capacitor ground connections must return to this pin using as wide and short a copper trace as practical.
2 VOUT power_out Regulated 5.0V output of the LDO, which must be stable with an output capacitor of 1µF to 22µF with at least 1mΩ ESR placed close to the VOUT and GND pins.
3 VIN power_in Supply input of the regulator, rated 2.5V to 36V in recommended operating conditions (absolute maximum VIN to GND is -0.3V to 40V), with a 1µF or larger input capacitor placed close to the VIN and GND pins.

Key specifications

Parameter Value
Manufacturer DSTECH
Package SOT-23-3
Category Power Management (PMIC)
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage VIN 2.5 36 V 5
DC Output Voltage Accuracy -1 1 % ILOAD =0.1mA 5
Dropout Voltage (VOUT ≥ 5V) VDROP 0.35 V ILOAD =100mA, VOUT ≥ 5V 5
Line Regulation ΔLINE 0.8 % ILOAD =1mA, 10V ≤ VIN ≤ 20V 5
Output Current Limit ILIM 201 350 mA VOUT =0V 5
Load Regulation ΔLOAD 0.5 % 10mA≤ ILOAD ≤ 0.1A 5
Ground Current IQ 2 μA ILOAD = 0mA, VOUT ≤ 5V 5
Thermal Shutdown Hysteresis ΔTSD 30 °C 5
Thermal Shutdown Temperature TSD 160 °C ILOAD =10mA 5
VIN to GND VIN to GND -0.3 40 V 4
VOUT to GND VOUT to GND -0.3 14 V 4
VOUT to VIN VOUT to VIN -40 0.3 V 4
Junction Temperature 150 °C 4
Lead Temperature (Soldering) 260 °C Soldering, 10 sec. 4
Storage Temperature Range -40 150 °C 4
ESD Susceptibility HBM 2 KV HBM 4
ESD Susceptibility MM 200 V MM 4
Input Voltage VIN 2.5 36 V 4
Junction Temperature Range -40 125 °C 4
Ambient Temperature Range -40 85 °C 4
Package Thermal Resistance, SOT-23-3 θJA 220 °C/W TA=25°C, DSTECH EVB board (Note 2) 4

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts copper must be back to the DS8402 ground pin using as wide and as short of a copper trace as is practical. 9

CAD (KiCad official)

  • Symbol: DS8402-50S3
  • Footprint: Package_TO_SOT_SMD:SOT-23-3
  • 3D model: SOT-23-3 (KiCad packages3D, STEP)
  • 3D model files: ds8402-50s3-etched.step / ds8402-50s3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ds8402-50s3.step / ds8402-50s3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: DSTECH datasheet (13 pp, sha256 920d1bd86b5963da, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF