JSM1302Z from JSMSEMI, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VCC2	power_in	Primary power supply input (main Vcc). Recommended operating voltage 2.0 V to 5.5 V. When VCC2 exceeds VCC1 + 0.2 V, the device is powered from VCC2 and can source trickle-charge current to VCC1.
2	X1	passive	32.768 kHz crystal oscillator connection. Connect a 32.768 kHz crystal between X1 and X2; the crystal's specified load capacitance (CL) should be 6 pF.
3	X2	passive	32.768 kHz crystal oscillator connection. Connect a 32.768 kHz crystal between X1 and X2; the crystal's specified load capacitance (CL) should be 6 pF.
4	GND	power_in	Ground reference (0 V) for the device.
5	RST	input	Active-low reset / chip-enable input (labeled with overline on datasheet). Must be driven high to initiate any data transfer and held high for the entire transaction; a low level aborts the transfer and forces the I/O pin to high-impedance. TTL-compatible (VIH ≥ 2.0 V, VIL ≤ +0.8 V at VCC=5 V).
6	I/O	bidirectional	Serial data input/output pin of the 3-wire interface. Data is clocked in on the rising edge of SCLK and clocked out on the falling edge. Pin goes to high-impedance when RST is low. I/O capacitance is 15 pF typical; leakage up to 500 µA.
7	SCLK	input	Serial clock input for the 3-wire interface, driven by the host microcontroller. Synchronizes data transfers on the I/O pin. Maximum clock frequency 0.5 MHz at VCC=2.5 V and 2.0 MHz at VCC=5 V (DC minimum).
8	VCC1	power_in	Backup power supply input (typically a battery or supercapacitor for timekeeping retention). Also acts as the output of the internal programmable trickle charger sourced from VCC2. When VCC2 + 0.2 V < VCC1, the device is powered from VCC1.

Key specifications

Parameter	Value
Manufacturer	JSMSEMI
Package	SOP-8
Category	RTC
Pins	8

Ordering variants

Same part, different packaging or reel option.

JSM1302ZZ/TR
JSM1302ZN

CAD (KiCad official)

Symbol: JSM1302Z
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOP-8 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`jsm1302z.step`	122 KB	You want the bare part, or you mark your own boards.
`jsm1302z-etched.step`	1.9 MB	You want the part with `JSM1302Z` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 459 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: JSMSEMI datasheet (13 pp, sha256 6953abaf7cde3cb8, retrieved 2026-08-17, tier: lcsc)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF