Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗
Loads on click. Unloads only if this page sits in the background.
Loads on click. Unloads only if this page sits in the background.
Download PDF
Contents

README

markdown

BQ3060PWR

Texas Instruments · Battery Management · TSSOP-24

BQ3060PWR from Texas Instruments, in a TSSOP-24. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 BAT power_in Battery power input from pack negative terminal.
2 DSG output P-channel FET drive output controlling discharge through external discharge FET.
3 VC1 bidirectional Most positive cell voltage measurement input and external cell balancing drive output.
4 VC2 bidirectional Second most positive cell voltage measurement input and external cell balancing drive output.
5 VC3 bidirectional Third most positive cell voltage measurement input and external cell balancing drive output.
6 VC4 bidirectional Least positive cell voltage measurement input and external cell balancing drive output.
7 SRP input Coulomb counter analog input connected to top of sense resistor (5-20 mΩ typical).
8 SRN input Coulomb counter analog input connected to bottom of sense resistor (5-20 mΩ typical).
9 TS1 bidirectional External thermistor temperature sensor input with internal biasing resistor.
10 TS2 bidirectional External thermistor temperature sensor input with internal biasing resistor.
11 NC unconnected No connect, keep this pin floating.
12 NC unconnected No connect, keep this pin floating.
13 NC unconnected No connect, keep this pin floating.
14 SMBD tri_state SMBus data line, open-drain I/O requiring external pull-up resistor.
15 NC unconnected No connect, keep this pin floating.
16 SMBC tri_state SMBus clock line, open-drain I/O requiring external pull-up resistor.
17 PRES tri_state Active low input to sense system insertion, open-drain capable, requires ESD protection.
18 RBI power_in RAM backup voltage input requiring ≥1 V from external capacitor for data retention.
19 VSS power_in Device ground, must connect to battery negative and sense resistor negative.
20 REG27 power_out Internal 2.7 V regulated power output, requires 1 μF external bypass capacitor.
21 FUSE bidirectional Push-pull fuse drive output controlling in-line fuse with secondary protector detection input.
22 ZVCHG output P-channel precharge FET drive output controlling zero-volt charge through external FET.
23 CHG output P-channel FET drive output controlling charge through external charge FET.
24 PACK power_in Pack positive terminal and alternative power source input (0-25 V).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-24
Category Power Management (PMIC)
Pins 24

CAD (KiCad official)

  • Symbol: BQ3060PWR
  • Footprint: Package_SO:TSSOP-24_4.4x7.8mm_P0.65mm
  • 3D model: TSSOP-24 (KiCad packages3D, STEP)
  • 3D model files: bq3060pwr-etched.step / bq3060pwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); bq3060pwr.step / bq3060pwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (22 pp, sha256 db1a851561ce802c, retrieved 2026-09-23, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF