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74LV540APWJ

Public Made by Adom

by adom

Nexperia Buffers, Drivers, Receivers, Transceivers, TSSOP-20. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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74LV540APWJ

Nexperia · Buffers, Drivers, Receivers, Transceivers · TSSOP-20

74LV540APWJ from Nexperia, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OE1 input Output enable input 1 (active LOW). A HIGH on OE1 forces all Y0-Y7 outputs to the high-impedance OFF-state. Schmitt-trigger input; VCC = 2.0 V to 5.5 V, overvoltage tolerant to 7.0 V.
2 A0 input Data input 0 to inverting buffer channel 0. Schmitt-trigger input; overvoltage tolerant to 7.0 V independent of VCC. Drives Y0 (pin 18) when outputs are enabled.
3 A1 input Data input 1 to inverting buffer channel 1. Schmitt-trigger input; overvoltage tolerant to 7.0 V independent of VCC. Drives Y1 (pin 17) when outputs are enabled.
4 A2 input Data input 2 to inverting buffer channel 2. Schmitt-trigger input; overvoltage tolerant to 7.0 V independent of VCC. Drives Y2 (pin 16) when outputs are enabled.
5 A3 input Data input 3 to inverting buffer channel 3. Schmitt-trigger input; overvoltage tolerant to 7.0 V independent of VCC. Drives Y3 (pin 15) when outputs are enabled.
6 A4 input Data input 4 to inverting buffer channel 4. Schmitt-trigger input; overvoltage tolerant to 7.0 V independent of VCC. Drives Y4 (pin 14) when outputs are enabled.
7 A5 input Data input 5 to inverting buffer channel 5. Schmitt-trigger input; overvoltage tolerant to 7.0 V independent of VCC. Drives Y5 (pin 13) when outputs are enabled.
8 A6 input Data input 6 to inverting buffer channel 6. Schmitt-trigger input; overvoltage tolerant to 7.0 V independent of VCC. Drives Y6 (pin 12) when outputs are enabled.
9 A7 input Data input 7 to inverting buffer channel 7. Schmitt-trigger input; overvoltage tolerant to 7.0 V independent of VCC. Drives Y7 (pin 11) when outputs are enabled.
10 GND power_in Ground reference (0 V). Ground current IGND is rated to -70 mA absolute maximum.
11 Y7 tri_state Inverting 3-state data output 7 (Y7 = /A7 when enabled; Hi-Z when OE1 HIGH or OE2 HIGH). IO up to +/-35 mA; drives 16 mA at VCC = 4.5 V with VOL <= 0.44 V typ.
12 Y6 tri_state Inverting 3-state data output 6 (Y6 = /A6 when enabled; Hi-Z when OE1 HIGH or OE2 HIGH). IO up to +/-35 mA; drives 16 mA at VCC = 4.5 V with VOL <= 0.44 V typ.
13 Y5 tri_state Inverting 3-state data output 5 (Y5 = /A5 when enabled; Hi-Z when OE1 HIGH or OE2 HIGH). IO up to +/-35 mA; drives 16 mA at VCC = 4.5 V with VOL <= 0.44 V typ.
14 Y4 tri_state Inverting 3-state data output 4 (Y4 = /A4 when enabled; Hi-Z when OE1 HIGH or OE2 HIGH). IO up to +/-35 mA; drives 16 mA at VCC = 4.5 V with VOL <= 0.44 V typ.
15 Y3 tri_state Inverting 3-state data output 3 (Y3 = /A3 when enabled; Hi-Z when OE1 HIGH or OE2 HIGH). IO up to +/-35 mA; drives 16 mA at VCC = 4.5 V with VOL <= 0.44 V typ.
16 Y2 tri_state Inverting 3-state data output 2 (Y2 = /A2 when enabled; Hi-Z when OE1 HIGH or OE2 HIGH). IO up to +/-35 mA; drives 16 mA at VCC = 4.5 V with VOL <= 0.44 V typ.
17 Y1 tri_state Inverting 3-state data output 1 (Y1 = /A1 when enabled; Hi-Z when OE1 HIGH or OE2 HIGH). IO up to +/-35 mA; drives 16 mA at VCC = 4.5 V with VOL <= 0.44 V typ.
18 Y0 tri_state Inverting 3-state data output 0 (Y0 = /A0 when enabled; Hi-Z when OE1 HIGH or OE2 HIGH). IO up to +/-35 mA; drives 16 mA at VCC = 4.5 V with VOL <= 0.44 V typ.
19 OE2 input Output enable input 2 (active LOW). A HIGH on OE2 forces all Y0-Y7 outputs to the high-impedance OFF-state. Schmitt-trigger input; overvoltage tolerant to 7.0 V.
20 VCC power_in Supply voltage. Recommended operating range 2.0 V to 5.5 V (absolute max -0.5 V to +7.0 V). Quiescent ICC is 2 uA typ (max 20 uA over -40 to +125 C) at VCC = 5.5 V.

Key specifications

Parameter Value
Manufacturer Nexperia
Package TSSOP-20
Category Logic
Pins 20

Ordering variants

Same part, different packaging or reel option.

  • 74LV540APWJ

CAD (KiCad official)

  • Symbol: 74LV540APWJ
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)
  • 3D model files: 74lv540apwj-etched.step / 74lv540apwj-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74lv540apwj.step / 74lv540apwj.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (12 pp, sha256 ca5c0ac522b8d503, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF