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TSH82IDT

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STMicroelectronics Video Amplifiers, SO-8. Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.

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TSH82IDT

STMicroelectronics · Video Amplifiers · SO-8

TSH82IDT from STMicroelectronics, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Output1 output Output of operator 1, rail-to-rail, up to 55 mA output current and specified for 150 Ω loads.
2 Inverting input1 input Inverting input of operator 1, common mode range from VCC- to (VCC+ -1.1) V.
3 Non inv. input1 input Non-inverting input of operator 1, common mode range from VCC- to (VCC+ -1.1) V.
4 VCC- power_in Negative supply voltage, connected to ground in single-supply operation; total supply range 4.5 to 12 V.
5 Non inv. input2 input Non-inverting input of operator 2, common mode range from VCC- to (VCC+ -1.1) V.
6 Inverting input2 input Inverting input of operator 2, common mode range from VCC- to (VCC+ -1.1) V.
7 Output2 output Output of operator 2, rail-to-rail, up to 55 mA output current and specified for 150 Ω loads.
8 VCC+ power_in Positive supply voltage; total supply range 4.5 to 12 V with absolute maximum of 14 V.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package SO-8
Category Amplifiers/Comparators
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input offset voltage (Tamb = 25 °C) /Vio/ 1.1 10 mV VCC+=+5 V, VCC-=GND, Vic=2.5 V, Tamb=25 °C 7
Input offset voltage (Tmin < Tamb < Tmax) /Vio/ 12 mV VCC+=+5 V, VCC-=GND, Vic=2.5 V, Tmin<Tamb<Tmax 7
Input offset current (Tamb = 25 °C) Iio 0.1 3.5 µA VCC+=+5 V, VCC-=GND, Vic=2.5 V, Tamb=25 °C 7
Input offset current (Tmin < Tamb < Tmax) Iio 5 µA VCC+=+5 V, VCC-=GND, Vic=2.5 V, Tmin<Tamb<Tmax 7
Input bias current (Tamb = 25 °C) Iib 6 15 µA VCC+=+5 V, VCC-=GND, Vic=2.5 V, Tamb=25 °C 7
Input bias current (Tmin < Tamb < Tmax) Iib 20 µA VCC+=+5 V, VCC-=GND, Vic=2.5 V, Tmin<Tamb<Tmax 7
Supply current per operator (Tamb = 25 °C) ICC 8.2 10.5 mA VCC+=+5 V, VCC-=GND, Vic=2.5 V, Tamb=25 °C 7
Supply current per operator (Tmin < Tamb < Tmax) ICC 11.5 mA VCC+=+5 V, VCC-=GND, Vic=2.5 V, Tmin<Tamb<Tmax 7
Common mode rejection ratio (Tamb = 25 °C) CMR 72 97 dB VCC+=+5 V, VCC-=GND; +0.1< Vic< 3.9 V and Vout = 2.5 V, Tamb=25 °C 7
Common mode rejection ratio (Tmin < Tamb < Tmax) CMR 70 dB VCC+=+5 V, VCC-=GND; +0.1< Vic< 3.9 V and Vout = 2.5 V, Tmin<Tamb<Tmax 7
Supply voltage rejection ratio (Tamb = 25 °C) SVR 68 75 dB VCC+=+5 V, VCC-=GND, Tamb=25 °C 7
Supply voltage rejection ratio (Tmin < Tamb < Tmax) SVR 65 dB VCC+=+5 V, VCC-=GND, Tmin<Tamb<Tmax 7
Large signal voltage gain (Tamb = 25 °C) Avd 75 84 dB VCC+=+5 V, VCC-=GND; RL = 150 Ω connected to 1.5 V and Vout = 1 V to 4 V, Tamb=25 °C 7
Large signal voltage gain (Tmin < Tamb < Tmax) Avd 70 dB VCC+=+5 V, VCC-=GND; RL = 150 Ω connected to 1.5 V and Vout = 1 V to 4 V, Tmin<Tamb<Tmax 7
Output current /Source/ (Tamb = 25 °C) Io 35 55 mA VCC+=+5 V, VCC-=GND; Vid = +1, Vout connected to 1.5 V, Tamb=25 °C 7
Output current /Source/ (Tmin < Tamb < Tmax) Io 28 mA VCC+=+5 V, VCC-=GND; Vid = +1, Vout connected to 1.5 V, Tmin<Tamb<Tmax 7
Output current Sink (Tamb = 25 °C) Io 33 55 mA VCC+=+5 V, VCC-=GND; Vid = -1, Vout connected to 1.5 V, Tamb=25 °C 7
Output current Sink (Tmin < Tamb < Tmax) Io 28 mA VCC+=+5 V, VCC-=GND; Vid = -1, Vout connected to 1.5 V, Tmin<Tamb<Tmax 7
Input offset voltage (Tamb = 25 °C) /Vio/ 0.8 10 mV VCC+=+5 V, VCC-=-5 V, Vic=GND, Tamb=25 °C 10
Input offset voltage (Tmin < Tamb < Tmax) /Vio/ 12 mV VCC+=+5 V, VCC-=-5 V, Vic=GND, Tmin<Tamb<Tmax 10
Input offset current (Tamb = 25 °C) Iio 0.1 3.5 µA VCC+=+5 V, VCC-=-5 V, Vic=GND, Tamb=25 °C 10
Input offset current (Tmin < Tamb < Tmax) Iio 5 µA VCC+=+5 V, VCC-=-5 V, Vic=GND, Tmin<Tamb<Tmax 10
Input bias current (Tamb = 25 °C) Iib 6 15 µA VCC+=+5 V, VCC-=-5 V, Vic=GND, Tamb=25 °C 10
Input bias current (Tmin < Tamb < Tmax) Iib 20 µA VCC+=+5 V, VCC-=-5 V, Vic=GND, Tmin<Tamb<Tmax 10
Supply current per operator (Tamb = 25 °C) ICC 9.8 12.3 mA VCC+=+5 V, VCC-=-5 V, Vic=GND, Tamb=25 °C 10
Supply current per operator (Tmin < Tamb < Tmax) ICC 13.4 mA VCC+=+5 V, VCC-=-5 V, Vic=GND, Tmin<Tamb<Tmax 10
Common mode rejection ratio (Tamb = 25 °C) CMR 81 106 dB VCC+=+5 V, VCC-=-5 V; -4.9 < Vic < 3.9 V and Vout = GND, Tamb=25 °C 10
Common mode rejection ratio (Tmin < Tamb < Tmax) CMR 72 dB VCC+=+5 V, VCC-=-5 V; -4.9 < Vic < 3.9 V and Vout = GND, Tmin<Tamb<Tmax 10
Supply voltage rejection ratio (Tamb = 25 °C) SVR 71 77 dB VCC+=+5 V, VCC-=-5 V, Tamb=25 °C 10
Supply voltage rejection ratio (Tmin < Tamb < Tmax) SVR 65 dB VCC+=+5 V, VCC-=-5 V, Tmin<Tamb<Tmax 10
Large signal voltage gain (Tamb = 25 °C) Avd 75 86 dB VCC+=+5 V, VCC-=-5 V; RL = 150 Ω connected to GND and Vout = -4 to +4, Tamb=25 °C 10
Large signal voltage gain (Tmin < Tamb < Tmax) Avd 70 dB VCC+=+5 V, VCC-=-5 V; RL = 150 Ω connected to GND and Vout = -4 to +4, Tmin<Tamb<Tmax 10
Output current /Source/ (Tamb = 25 °C) Io 35 55 mA VCC+=+5 V, VCC-=-5 V; Vid = +1, Vout connected to 1.5 V, Tamb=25 °C 10
Output current /Source/ (Tmin < Tamb < Tmax) Io 28 mA VCC+=+5 V, VCC-=-5 V; Vid = +1, Vout connected to 1.5 V, Tmin<Tamb<Tmax 10
Output current Sink (Tamb = 25 °C) Io 30 55 mA VCC+=+5 V, VCC-=-5 V; Vid = -1, Vout connected to 1.5 V, Tamb=25 °C 10
Output current Sink (Tmin < Tamb < Tmax) Io 28 mA VCC+=+5 V, VCC-=-5 V; Vid = -1, Vout connected to 1.5 V, Tmin<Tamb<Tmax 10
Supply voltage VCC 4.5 12 V 6
Supply voltage VCC 14 V 6
Differential input voltage Vid -2 2 V Non-inverting input with respect to inverting input 6
Input voltage Vi -6 6 V Magnitude must never exceed VCC+0.3 V 6
Operating free air temperature range Toper -40 85 °C 6
Storage temperature Tstg -65 150 °C 6
Maximum junction temperature Tj 150 °C 6
Thermal resistance junction-to-case, SO8 Rthjc 28 °C/W SO8 package; short-circuits can cause excessive heating 6
Thermal resistance junction-to-ambient area, SO8 Rthja 157 °C/W SO8 package 6
ESD human body model (HBM) ESD HBM 2 kV 100 pF through 1.5 kΩ 6
ESD machine model (MM) ESD MM 0.2 kV 200 pF, no series resistor 6
ESD charged device model (CDM) ESD CDM 1.5 kV All pins charged and discharged through one pin 6

CAD (KiCad official)

  • Symbol: TSH82IDT
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: tsh82idt-etched.step / tsh82idt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tsh82idt.step / tsh82idt.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (30 pp, sha256 78661ee32fe192fb, retrieved 2026-10-21, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF