component
SN65EPT22DR
Public Made by Adomby adom
Texas Instruments Translators, Level Shifters, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN65EPT22DR
Texas Instruments · Translators, Level Shifters · SOIC-8
SN65EPT22DR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Q0 | output | True (non-inverted) LVPECL data output of channel 0, driven HIGH between 2155 mV and 2405 mV and LOW between 1355 mV and 1605 mV when loaded 50 Ω to VCC-2.0 V. |
| 2 | Q0̅ | output | Complementary (inverted) LVPECL data output of channel 0, forming a differential pair with Q0 with the same VOH/VOL swing when loaded 50 Ω to VCC-2.0 V. |
| 3 | Q1 | output | True (non-inverted) LVPECL data output of channel 1, driven HIGH between 2155 mV and 2405 mV and LOW between 1355 mV and 1605 mV when loaded 50 Ω to VCC-2.0 V. |
| 4 | Q1̅ | output | Complementary (inverted) LVPECL data output of channel 1, forming a differential pair with Q1 with the same VOH/VOL swing when loaded 50 Ω to VCC-2.0 V. |
| 5 | GND | power_in | Ground reference (0 V) for the device, used as the return for both the LVTTL input side and the LVPECL output side. |
| 6 | D1 | input | LVTTL data input for channel 1, PNP single-ended input with VIH ≥ 2.0 V, VIL ≤ 0.8 V, and an internal deterministic HIGH default when left open. |
| 7 | D0 | input | LVTTL data input for channel 0, PNP single-ended input with VIH ≥ 2.0 V, VIL ≤ 0.8 V, and an internal deterministic HIGH default when left open. |
| 8 | VCC | power_in | Positive supply for both the LVTTL input stage and the LVPECL output stage, specified from 3.0 V to 3.6 V with GND = 0 V, drawing 39 mA to 50 mA supply current (ICC) over temperature. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Logic |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
SN65EPT22DR - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
sn65ept22dr-etched.step/sn65ept22dr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn65ept22dr.step/sn65ept22dr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (20 pp, sha256
394087ec629932c1, retrieved 2026-09-23, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).