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ADS1114BQDGSRQ1
Public Made by Adomby adom
Texas Instruments Analog To Digital Converters (ADCs), MSOP-10. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownADS1114BQDGSRQ1
Texas Instruments · Analog To Digital Converters (ADCs) · MSOP-10
ADS1114BQDGSRQ1 from Texas Instruments, in a MSOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | ADDR | input | I2C target address select; the pin is connected to GND, VDD, SDA, or SCL to choose one of four target addresses. |
| 2 | ALERT/RDY | output | Comparator output or conversion ready output on this ADS1114-Q1 pin; it is an open-drain output that connects to VDD through a pullup resistor. |
| 3 | GND | power_in | Analog ground. |
| 4 | AIN0 | passive | Analog input 0. |
| 5 | AIN1 | passive | Analog input 1. |
| 6 | NC | unconnected | No connect; leave the pin floating or connect it to GND. |
| 7 | NC | unconnected | No connect; leave the pin floating or connect it to GND. |
| 8 | VDD | power_in | Power supply; connect a 0.1-μF power-supply decoupling capacitor to GND. |
| 9 | SDA | bidirectional | Serial data input and output; connect to VDD using a pullup resistor. |
| 10 | SCL | input | Serial clock input; connect to VDD using a pullup resistor. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | MSOP-10 |
| Category | Data Converters |
| Pins | 10 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Power-supply voltage VDD to GND | VDD | -0.3 | 7 | V | 5 | ||
| Input current, continuous | -10 | 10 | mA | Any pin except power supply pins | 5 | ||
| Digital input voltage SDA, SCL, ADDR, ALERT/RDY | 5.5 | V | 5 | ||||
| Operating ambient temperature | TA | -40 | 125 | °C | 5 | ||
| Junction temperature | TJ | -40 | 150 | °C | 5 | ||
| Storage temperature | Tstg | -60 | 150 | °C | 5 | ||
| Power supply (VDD to GND) | VDD | 2 | 5.5 | V | 5 | ||
| Digital input voltage | VDIG | 5.5 | V | 5 | |||
| Operating ambient temperature | TA | -40 | 125 | °C | 5 | ||
| Offset error, differential inputs | -3 | 3 | LSB | FSR = ±2.048 V, differential inputs | 7 | ||
| Offset error, single-ended inputs | -3 | 3 | LSB | FSR = ±2.048 V, single-ended inputs | 7 | ||
| Data rate variation | -10 | 10 | % | All data rates | 7 | ||
| Gain error | 0.01 | 0.15 | % | FSR = ±2.048 V, TA = 25°C | 7 | ||
| Gain drift over temperature | 5 | 40 | ppm/°C | FSR = ±2.048 V | 7 | ||
| Gain match | 0.02 | 0.1 | % | Match between any two gains | 7 | ||
| Gain channel match | 0.05 | 0.1 | % | Match between any two inputs | 7 | ||
| Integral nonlinearity | INL | 1 | LSB | DR = 8 SPS, FSR = ±2.048 V | 7 | ||
| High-level input voltage | VIH | 5.5 | V | 7 | |||
| Low-level output voltage | VOL | 0.15 | 0.4 | V | IOL = 3 mA | 7 | |
| Input leakage current | -10 | 10 | µA | GND < VDIG < VDD | 7 | ||
| Supply current, power-down | IVDD | 0.5 | 2 | µA | TA = 25°C | 8 | |
| Supply current, power-down | IVDD | 5 | µA | Power-down | 8 | ||
| Supply current, operating | IVDD | 150 | 200 | µA | TA = 25°C | 8 | |
| Supply current, operating | IVDD | 300 | µA | Operating | 8 | ||
| SCL clock frequency | fSCL | 0.01 | 0.4 | MHz | Fast mode | 8 | |
| SCL clock frequency | fSCL | 0.01 | 3.4 | MHz | High-speed mode | 8 | |
| Bus free time between START and STOP condition | tBUF | 600 | ns | Fast mode | 8 | ||
| Bus free time between START and STOP condition | tBUF | 160 | ns | High-speed mode | 8 | ||
| Low period of the SCL clock pin | tLOW | 1300 | ns | Fast mode | 8 | ||
| Low period of the SCL clock pin | tLOW | 160 | ns | High-speed mode | 8 | ||
| High period for the SCL clock pin | tHIGH | 600 | ns | Fast mode | 8 | ||
| High period for the SCL clock pin | tHIGH | 60 | ns | High-speed mode | 8 | ||
| Data setup time | tSUDAT | 100 | ns | Fast mode | 8 | ||
| Data setup time | tSUDAT | 10 | ns | High-speed mode | 8 | ||
| Power dissipation | PD | 0.9 | mW | VDD = 5.0 V | 8 | ||
| Power dissipation | PD | 0.5 | mW | VDD = 3.3 V | 8 | ||
| Power dissipation | PD | 0.3 | mW | VDD = 2.0 V | 8 | ||
| Gain power-supply rejection | 80 | ppm/V | 7 | ||||
| Offset drift over temperature | 0.005 | LSB/°C | FSR = ±2.048 V | 7 | |||
| Offset power-supply rejection | 1 | LSB/V | FSR = ±2.048 V, DC supply variation | 7 | |||
| Common-mode rejection ratio, DC | CMRR | 105 | dB | At DC, FSR = ±0.256 V | 7 | ||
| Common-mode rejection ratio, DC | CMRR | 100 | dB | At DC, FSR = ±2.048 V | 7 | ||
| Common-mode rejection ratio, DC | CMRR | 90 | dB | At DC, FSR = ±6.144 V | 7 | ||
| Junction-to-ambient thermal resistance | RθJA | 170.9 | °C/W | DGS (VSSOP) 10 pins | 6 | ||
| Junction-to-case (top) thermal resistance | RθJC(top) | 61 | °C/W | DGS (VSSOP) 10 pins | 6 | ||
| Junction-to-board thermal resistance | RθJB | 91.2 | °C/W | DGS (VSSOP) 10 pins | 6 | ||
| Junction-to-top characterization parameter | ψJT | 8.5 | °C/W | DGS (VSSOP) 10 pins | 6 | ||
| Junction-to-board characterization parameter | ψJB | 89.8 | °C/W | DGS (VSSOP) 10 pins | 6 |
CAD (KiCad official)
- Symbol:
ADS1114BQDGSRQ1 - Footprint:
Package_SO:MSOP-10_3x3mm_P0.5mm - 3D model: MSOP-10 (KiCad packages3D, STEP)
- 3D model files:
ads1114bqdgsrq1-etched.step/ads1114bqdgsrq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ads1114bqdgsrq1.step/ads1114bqdgsrq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (50 pp, sha256
e26e0a97e37eec4b, retrieved 2026-10-28, tier: manufacturer) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).