component
MC79L05ABDR2G
Public Made by Adomby adom
onsemi Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMC79L05ABDR2G
onsemi · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOIC-8
MC79L05ABDR2G from onsemi, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Vout | power_out | Regulated negative output, nominally −5.0 V, held between −4.75 V and −5.25 V over the stated input and load conditions, with a 0.1 µF output capacitor CO recommended to improve stability and transient response. |
| 2 | Vin | power_in | Unregulated negative input, with a maximum input voltage of −30 Vdc for the −5 V device and an input of typically at least 2.0 V above the output voltage needed even at the ripple low point. |
| 3 | Vin | power_in | Unregulated negative input (same net as pin 2 per the input pin group), limited to −30 Vdc maximum for the −5 V device and bypassed with a 0.33 µF capacitor CI when the regulator is far from the supply filter. |
| 4 | NC | unconnected | No connection; the datasheet pinout lists this pin as NC and gives no electrical function for it. |
| 5 | GND | power_in | Common ground that must be shared between the input and output voltages, with ground-loop and lead-resistance drops minimized because the regulator has no external sense lead. |
| 6 | Vin | power_in | Unregulated negative input (same net as pin 2 per the input pin group), limited to −30 Vdc maximum for the −5 V device. |
| 7 | Vin | power_in | Unregulated negative input (same net as pin 2 per the input pin group), limited to −30 Vdc maximum for the −5 V device. |
| 8 | NC | unconnected | No connection; the datasheet pinout lists this pin as NC and gives no electrical function for it. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output Voltage (TJ = +25°C) | VO | -4.8 | -5 | -5.2 | Vdc | TJ = +25°C | 2 |
| Output Voltage | VO | -4.75 | -5.25 | Vdc | −7.0 Vdc ≥ VI ≥ −20 Vdc, 1.0 mA ≤ IO ≤ 40 mA; VI = −10 Vdc, 1.0 mA ≤ IO ≤ 70 mA | 2 | |
| Input Regulation | Regline | 150 | mV | TJ = +25°C; −7.0 Vdc ≥ VI ≥ −20 Vdc | 2 | ||
| Input Regulation | Regline | 100 | mV | TJ = +25°C; −8.0 Vdc ≥ VI ≥ −20 Vdc | 2 | ||
| Load Regulation | Regload | 60 | mV | TJ = +25°C, 1.0 mA ≤ IO ≤ 100 mA | 2 | ||
| Load Regulation | Regload | 30 | mV | 1.0 mA ≤ IO ≤ 40 mA | 2 | ||
| Input Bias Current (TJ = +25°C) | IIB | 6 | mA | TJ = +25°C | 2 | ||
| Input Bias Current (TJ = +125°C) | IIB | 5.5 | mA | TJ = +125°C | 2 | ||
| Input Bias Current Change | IIB | 1.5 | mA | −8.0 Vdc ≥ VI ≥ −20 Vdc | 2 | ||
| Input Bias Current Change | IIB | 0.1 | mA | 1.0 mA ≤ IO ≤ 40 mA | 2 | ||
| Ripple Rejection | RR | 41 | 49 | dB | −8.0 ≥ VI ≥ −18 Vdc, f = 120 Hz, TJ = +25°C | 2 | |
| Input Voltage (−5 V device) | VI | -30 | Vdc | MC79L05 (−5 V) device | 2 | ||
| Storage Temperature Range | Tstg | -65 | 150 | °C | 2 | ||
| Junction Temperature | TJ | 150 | °C | 2 | |||
| Thermal Resistance, Junction-to-Ambient (SOIC-8) | RJA | 180 | °C/W | Case 751 SOIC-8, minimum recommended pad size | 2 | ||
| Thermal Resistance, Junction-to-Case (SOIC-8) | RJC | 45 | °C/W | Case 751 SOIC-8 | 2 | ||
| Operating Junction Temperature Range (MC79L05AB) | TJ | -40 | 125 | °C | MC79LXXAB | 2 |
CAD (KiCad official)
- Symbol:
MC79L05ABDR2G - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
mc79l05abdr2g-etched.step/mc79l05abdr2g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mc79l05abdr2g.step/mc79l05abdr2g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (14 pp, sha256
115a59773830cb30, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).