component

DAC6578SRGER

Public Made by Adom

by adom

Texas Instruments Digital To Analog Converters (DAC), VQFN-24-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentdata acquisitiondac6578srgerfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

3D Model

Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

Datasheet

Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

DAC6578SRGER

Texas Instruments · Digital To Analog Converters (DAC) · VQFN-24-EP(4x4)

DAC6578SRGER from Texas Instruments, in a VQFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NC unconnected Not internally connected.
2 AVDD power_in Analog power-supply input, specified from 2.7 V to 5.5 V.
3 VOUTA output Analog output voltage from DAC A.
4 VOUTC output Analog output voltage from DAC C.
5 VOUTE output Analog output voltage from DAC E.
6 VOUTG output Analog output voltage from DAC G.
7 NC unconnected Not internally connected.
8 VREFIN input Positive reference input; absolute voltage range to GND is -0.3 V to AVDD + 0.3 V.
9 RSTSEL input Reset select: high resets the device to mid-scale, low resets the device to zero-scale.
10 ADDR1 input 3-state address input used to set the I2C device address.
11 ADDR0 input 3-state address input used to set the I2C device address.
12 CLR input Asynchronous clear input.
13 VOUTH output Analog output voltage from DAC H.
14 VOUTF output Analog output voltage from DAC F.
15 VOUTD output Analog output voltage from DAC D.
16 VOUTB output Analog output voltage from DAC B.
17 GND power_in Ground reference point for all circuitry on the device.
18 NC unconnected Not internally connected.
19 SDA bidirectional Bidirectional open-drain serial data line that should be connected to the supply voltage through an external pull-up resistor.
20 SCL input Serial clock input, supporting rates up to 3.4 MHz; Schmitt-trigger logic input.
21 TWOC input Twos complement select: pulled high selects twos complement DAC register format, pulled low selects straight binary.
22 LDAC input Load DACs input controlling when buffered data is transferred to the DAC registers (asynchronous or synchronous update mode, see LDAC Functionality section).
23 NC unconnected Not internally connected.
24 NC unconnected Not internally connected.
25 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-24-EP(4x4)
Category Data Acquisition
Pins 25

CAD (KiCad official)

  • Symbol: DAC6578SRGER
  • Footprint: Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.7x2.7mm
  • 3D model: VQFN-24-EP(4x4) (KiCad packages3D, STEP)
  • 3D model files: dac6578srger-etched.step / dac6578srger-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dac6578srger.step / dac6578srger.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (60 pp, sha256 384236e44db678a7, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF