RD3H045SPFRATL from ROHM Semicon, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	Gate	input	Gate terminal with a built-in ESD protection diode; VGSS is limited to ±20 V and the gate threshold voltage VGS(th) is -1.0 to -3.0 V at VDS = -10 V, ID = -1 mA.
2	Drain	passive	Drain terminal (also the tab in the outline drawing) with VDSS of -45 V and continuous drain current ID of ±4.5 A (pulsed IDP ±9.0 A).
3	Source	passive	Source terminal connected to the body diode, with continuous forward current IS of -4.5 A and pulsed forward current ISP of -9.0 A.

Key specifications

Parameter	Value
Manufacturer	ROHM Semicon
Package	TO-252
Category	Triode/MOS Tube/Transistor
Pins	3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Drain - Source voltage	VDSS	-45			V		1
Continuous drain current	ID	-4.5		4.5	A	*1 Limited only by maximum temperature allowed.	1
Pulsed drain current	IDP	-9		9	A	*2 Pw≦10μs, Duty cycle≦1%	1
Gate - Source voltage	VGSS	-20		20	V		1
Power dissipation	PD			15	W	*3 Tc=25℃	1
Junction temperature	Tj			150	℃		1
Operating junction and storage temperature range	Tstg	-55		150	℃		1
Thermal resistance, junction - case	RthJC			8.33	℃/W	*3 Tc=25℃	2
Drain - Source breakdown voltage	V(BR)DSS	-45			V	VGS = 0V, ID = -1mA	2
Zero gate voltage drain current	IDSS			-1	μA	VDS = -45V, VGS = 0V	2
Gate - Source leakage current	IGSS	-10		10	μA	VGS = ±20V, VDS = 0V	2
Gate threshold voltage	VGS(th)	-1		-3	V	VDS = -10V, ID = -1mA	2
Static drain - source on - state resistance (VGS = -10V)	RDS(on)		110	155	mΩ	*4 VGS = -10V, ID = -4.5A	2
Static drain - source on - state resistance (VGS = -4.5V)	RDS(on)		160	225	mΩ	*4 VGS = -4.5V, ID = -4.5A	2
Static drain - source on - state resistance (VGS = -4.0V)	RDS(on)		185	260	mΩ	*4 VGS = -4.0V, ID = -4.5A	2
Forward transfer admittance	/Yfs/	3			S	*4 VDS = -10V, ID = -4.5A	2
Breakdown voltage temperature coefficient	ΔV(BR)DSS/ΔTj		-50		mV/℃	ID = -1mA, referenced to 25℃	2
Gate threshold voltage temperature coefficient	ΔVGS(th)/ΔTj		3.3		mV/℃	ID = -1mA, referenced to 25℃	2
Gate resistance	RG		7.7		Ω	f = 1MHz, open drain	2
Input capacitance	Ciss		550		pF	VGS = 0V	3
Output capacitance	Coss		100		pF	VDS = -10V	3
Reverse transfer capacitance	Crss		50		pF	f = 1MHz	3
Turn - on delay time	td(on)		8		ns	*4 VDD ≒ -25V, VGS = -10V	3
Rise time	tr		8		ns	*4 ID = -2A	3
Turn - off delay time	td(off)		35		ns	*4 RL ≒ 12.5Ω	3
Fall time	tf		8		ns	*4 RG = 10Ω	3
Total gate charge	Qg		12		nC	*4 VDD ≒ -25V, ID = -4.5A, VGS = -5V	3
Gate - Source charge	Qgs		2.2		nC		3
Gate - Drain charge	Qgd		2.2		nC		3
Continuous forward current	IS			-4.5	A	*1 Ta = 25℃	3
Pulse forward current	ISP			-9	A	*2 Pw≦10μs, Duty cycle≦1%	3
Forward voltage	VSD			-1.2	V	*4 VGS = 0V, IS = -4.5A	3

CAD (KiCad official)

Symbol: RD3H045SPFRATL
Footprint: Package_TO_SOT_SMD:TO-252-2
3D model: TO-252 (KiCad packages3D, STEP)
3D model files: rd3h045spfratl-etched.step / rd3h045spfratl-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); rd3h045spfratl.step / rd3h045spfratl.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: ROHM Semicon datasheet (14 pp, sha256 a50faf336397fcba, retrieved 2026-11-04, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

RD3H045SPFRATL

Verified RD3H045SPFRATL

Verification log 1 record

3D Model

Symbol & Footprint

Schematic Symbol

PCB Footprint

Datasheet

README