LT6411IUD#PBF from Analog Devices, in a QFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VEE	power_in	Negative supply voltage; VEE pins are not internally connected to each other and must all be connected externally with proper supply bypassing.
2	VEE	power_in	Negative supply voltage; VEE pins are not internally connected to each other and must all be connected externally with proper supply bypassing.
3	VEE	power_in	Negative supply voltage for the output stage; VEE pins are not internally connected to each other and must all be connected externally.
4	NC	unconnected	This pin is not internally connected.
5	OUT2	output	Output of channel 2; the gain is set by the connection of the channel 2 input pins (see Table 1 in Applications Information).
6	VCC	power_in	Positive supply voltage for the output stage; VCC pins are not internally connected to each other and must all be connected externally.
7	VEE	power_in	Negative supply voltage for the output stage; VEE pins are not internally connected to each other and must all be connected externally.
8	OUT1	output	Output of channel 1; the gain is set by the connection of the channel 1 input pins (see Table 1 in Applications Information).
9	VCC	power_in	Positive supply voltage for the output stage; VCC pins are not internally connected to each other and must all be connected externally.
10	VCC	power_in	Positive supply voltage; VCC pins are not internally connected to each other and must all be connected externally with proper supply bypassing.
11	EN	input	TTL-compatible enable control referenced to DGND; an internal 46k pull-up turns the part off when floating, and pulling the pin low enables the part (driving above 2V disables it).
12	DGND	power_in	Digital ground reference for the enable pin; this pin is normally connected to ground and must satisfy VCC - VDGND ≥ 3V.
13	IN1+	input	Channel 1 positive input with a nominal impedance of 400kΩ and no internal termination resistor.
14	IN1-	input	Connects to the internal resistor network of the channel 1 amplifier, through a 370Ω resistor to the inverting input.
15	IN2-	input	Connects to the internal resistor network of the channel 2 amplifier, through a 370Ω resistor to the inverting input.
16	IN2+	input	Channel 2 positive input with a nominal impedance of 400kΩ and no internal termination resistor.
17	EP (VEE)	power_in	Exposed pad is internally connected to VEE (pin 1) and must be soldered to the PCB; with split supplies it must not be tied to ground.

Key specifications

Parameter	Value
Manufacturer	Analog Devices
Package	QFN-16-EP(3x3)
Category	Operational Amplifier/Comparator
Pins	17

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Input Referred Offset Voltage	VOS	-10	3	10	mV	VIN = 0V, VOS = VOUT/2	2
Input Referred Offset Voltage (over temperature)	VOS	-20		20	mV	VIN = 0V, VOS = VOUT/2; full operating temperature range (●)	2
Input Current	IIN	-17			µA	Full operating temperature range (●)	2
Input Current	IIN	-50		50	µA	Full operating temperature range (●)	2
Input Resistance	RIN	150		500	kΩ	VIN = ±1V, full operating temperature range (●)	2
Power Supply Rejection Ratio	PSRR	56	62		dB	VS (Total) = 4.5V to 12V (Note 6), full operating temperature range (●)	2
Input Current Power Supply Rejection	IPSRR	-4	1	4	µA/V	VS (Total) = 4.5V to 12V (Note 6), full operating temperature range (●)	2
Gain Error	AV ERR	-1.2			%	VOUT = ±2V, full operating temperature range (●)	2
Gain Error	AV ERR	-5		5	%	VOUT = ±2V, full operating temperature range (●)	2
Gain Matching	AV MATCH	-1		1	%	VOUT = ±2V	2
Maximum Output Voltage Swing	VOUT	-3.7		3.7	V	RL = 1k	2
Maximum Output Voltage Swing	VOUT	-3.25		3.25	V	RL = 150Ω	2
Maximum Output Voltage Swing	VOUT	-3.1		3.1	V	RL = 150Ω, full operating temperature range (●)	2
Supply Current, Per Amplifier	IS		8	11	mA	Per amplifier	2
Supply Current, Per Amplifier	IS			14	mA	Per amplifier, full operating temperature range (●)	2
Supply Current, Disabled, per Amplifier	IS		22	350	µA	VEN = 4V, full operating temperature range (●)	2
Supply Current, Disabled, per Amplifier	IS		0.5	350	µA	VEN = Open, full operating temperature range (●)	2
Enable Pin Current	IEN	-200	-95		µA	VEN = 0.4V, full operating temperature range (●)	2
Enable Pin Current	IEN		0.5	50	µA	VEN = V+, full operating temperature range (●)	2
Output Short-Circuit Current	ISC	-50		50	mA	RL = 0Ω, VIN = ±1V, full operating temperature range (●)	3
Output Short-Circuit Current	ISC	-105		105	mA	RL = 0Ω, VIN = ±1V, full operating temperature range (●)	3
Slew Rate	SR	1700	3300		V/µs	±1V on ±2V Output Step (Note 9)	3
Full Power Bandwidth 2V	FPBW	270	525		MHz	VOUT = 2VP-P (Note 7)	3
All Hostile Crosstalk				-75	dB	f = 10MHz, VOUT = 2VP-P	3
All Hostile Crosstalk				-50	dB	f = 100MHz, VOUT = 2VP-P	3
Total Supply Voltage (VS, VCC to VEE)	VS	4.5		12.6	V	Wide supply range: ±2.25V (4.5V) to ±6.3V (12.6V)	1
Supply Headroom for Enable Circuitry	VCC, VDGND	3			V	Required constraint	9
Enable Pin Voltage Range	VEN, VDGND	-0.5		5.5	V	Required constraint	9
Input Current		-10		10	mA	Note 2	2
Output Current (Continuous)		-70		70	mA	Continuous	2
Operating Temperature Range		-40		85	°C	Note 4	2
Specified Temperature Range		-40		85	°C	Note 5; LT6411I guaranteed	2
Storage Temperature Range		-65		125	°C		2
Junction Temperature	TJ			125	°C		2
Junction-to-Ambient Thermal Resistance	θJA		68		°C/W	UD 16-lead QFN package	2
Junction-to-Case Thermal Resistance	θJC		4.2		°C/W	UD 16-lead QFN package	2

CAD (KiCad official)

Symbol: LT6411IUD#PBF
Footprint: Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm
3D model: QFN-16-EP(3x3) (KiCad packages3D, STEP)
3D model files: lt6411iud-pbf-etched.step / lt6411iud-pbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lt6411iud-pbf.step / lt6411iud-pbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Analog Devices datasheet (16 pp, sha256 bbb387b7430b06ce, retrieved 2026-10-30, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

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LT6411IUD#PBF

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3D Model

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