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Contents

README

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MSP430f235TPMR

Texas Instruments · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

MSP430f235TPMR from Texas Instruments, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 DVCC power_in Digital power supply voltage positive terminal, +1.8V to +3.6V, supplies power to all digital circuits.
2 P6.3/A3 bidirectional General-purpose digital I/O or 12-bit ADC analog input channel A3.
3 P6.4/A4 bidirectional General-purpose digital I/O or 12-bit ADC analog input channel A4.
4 P6.5/A5 bidirectional General-purpose digital I/O or 12-bit ADC analog input channel A5.
5 P6.6/A6 bidirectional General-purpose digital I/O or 12-bit ADC analog input channel A6.
6 P6.7/A7/SVSIN bidirectional General-purpose digital I/O, 12-bit ADC analog input channel A7, or SVS input.
7 VREF+ power_in ADC12 reference voltage positive output, +1.5V or +2.5V selectable.
8 XIN input Low-frequency crystal oscillator (XT1) input terminal for 32kHz watch crystal or high-frequency crystal.
9 XOUT output Low-frequency crystal oscillator (XT1) output terminal for 32kHz watch crystal or high-frequency crystal.
10 VeREF+ input External positive reference voltage input for ADC12, minimum 1.4V.
11 VREF-/VeREF- power_in ADC12 negative reference input, accepts internal reference or external applied reference voltage.
12 P1.0/TACLK/CAOUT bidirectional General-purpose digital I/O, Timer_A clock signal TACLK input, or Comparator_A input.
13 P1.1/TA0 bidirectional General-purpose digital I/O, Timer_A capture CCI0A input or compare Out0 output, or BSL transmit.
14 P1.2/TA1 bidirectional General-purpose digital I/O, Timer_A capture CCI1A input or compare Out1 output.
15 P1.3/TA2 bidirectional General-purpose digital I/O, Timer_A capture CCI2A input or compare Out2 output.
16 P1.4/SMCLK bidirectional General-purpose digital I/O or SMCLK subsystem clock signal output.
17 P1.5/TA0 bidirectional General-purpose digital I/O or Timer_A compare Out0 output.
18 P1.6/TA1 bidirectional General-purpose digital I/O or Timer_A compare Out1 output.
19 P1.7/TA2 bidirectional General-purpose digital I/O or Timer_A compare Out2 output.
20 P2.0/ACLK/CA2 bidirectional General-purpose digital I/O, ACLK auxiliary clock output, or Comparator_A input.
21 P2.1/TAINCLK/CA3 bidirectional General-purpose digital I/O, Timer_A clock signal on INCLK input, or Comparator_A input.
22 P2.2/CAOUT/TA0/CA4 bidirectional General-purpose digital I/O, Timer_A capture CCI0B input, Comparator_A output, BSL receive, or Comparator_A input CA4.
23 P2.3/CA0/TA1 bidirectional General-purpose digital I/O, Timer_A capture Out1 output, or Comparator_A input CA0.
24 P2.4/CA1/TA2 bidirectional General-purpose digital I/O, Timer_A capture Out2 output, or Comparator_A input CA1.
25 P2.5/ROSC/CA5 bidirectional General-purpose digital I/O input for external resistor defining DCO nominal frequency, or Comparator_A input CA5.
26 P2.6/ADC12CLK/CA6 bidirectional General-purpose digital I/O, 12-bit ADC conversion clock input, or Comparator_A input CA6.
27 P2.7/TA0/CA7 bidirectional General-purpose digital I/O, Timer_A capture Out0 output, or Comparator_A input CA7.
28 P3.0/UCB0STE/UCA0CLK bidirectional General-purpose digital I/O, USCI_B0 slave device transmit enable, or USCI_A0 clock input/output.
29 P3.1/UCB0SIMO/UCB0SDA bidirectional General-purpose digital I/O, USCI_B0 SPI slave input/master output or I2C SDA data.
30 P3.2/UCB0SOMI/UCB0SCL bidirectional General-purpose digital I/O, USCI_B0 SPI slave output/master input or I2C SCL clock.
31 P3.3/UCB0CLK/UCA0STE bidirectional General-purpose digital I/O, USCI_B0 clock input/output, or USCI_A0 slave device transmit enable.
32 P3.4/UCA0TXD/UCA0SIMO bidirectional General-purpose digital I/O, UART USCI_A0 transmit data output or SPI slave data input/master output.
33 P3.5/UCA0RXD/UCA0SOMI bidirectional General-purpose digital I/O, UART USCI_A0 receive data input or SPI slave data output/master input.
34 P3.6 bidirectional General-purpose digital I/O port pin P3.6.
35 P3.7 bidirectional General-purpose digital I/O port pin P3.7.
36 P4.0/TB0 bidirectional General-purpose digital I/O, Timer_B capture CCI0A/B input or compare Out0 output.
37 P4.1/TB1 bidirectional General-purpose digital I/O, Timer_B capture CCI1A/B input or compare Out1 output.
38 P4.2/TB2 bidirectional General-purpose digital I/O, Timer_B capture CCI2A/B input or compare Out2 output.
39 P4.3 bidirectional General-purpose digital I/O port pin P4.3.
40 P4.4 bidirectional General-purpose digital I/O port pin P4.4.
41 P4.5 bidirectional General-purpose digital I/O port pin P4.5.
42 P4.6 bidirectional General-purpose digital I/O port pin P4.6.
43 P4.7/TBCLK bidirectional General-purpose digital I/O or Timer_B clock signal TBCLK input.
44 P5.0 bidirectional General-purpose digital I/O port pin P5.0.
45 P5.1 bidirectional General-purpose digital I/O port pin P5.1.
46 P5.2 bidirectional General-purpose digital I/O port pin P5.2.
47 P5.3 bidirectional General-purpose digital I/O port pin P5.3.
48 P5.4/MCLK bidirectional General-purpose digital I/O or master system clock MCLK output, maximum 16MHz.
49 P5.5/SMCLK bidirectional General-purpose digital I/O or subsystem clock SMCLK output, maximum 16MHz.
50 P5.6/ACLK bidirectional General-purpose digital I/O or auxiliary clock ACLK output, nominal 32kHz.
51 P5.7/TBOUTH/SVSOUT bidirectional General-purpose digital I/O, Timer_B PWM output control switching ports to high impedance, or SVS comparator output.
52 XT2OUT output High-frequency crystal oscillator XT2 output terminal for 0.4MHz to 16MHz crystal.
53 XT2IN input High-frequency crystal oscillator XT2 input terminal for 0.4MHz to 16MHz crystal.
54 TDO/TDI bidirectional JTAG test data output or programming data input terminal.
55 TDI/TCLK input JTAG test data input or test clock input, with device protection fuse connection.
56 TMS input JTAG test mode select input port for device programming and testing.
57 TCK input JTAG test clock input port for device programming and bootloader startup.
58 RST/NMI input Reset input, non-maskable interrupt input, or bootloader startup in flash device.
59 P6.0/A0 bidirectional General-purpose digital I/O or 12-bit ADC analog input channel A0.
60 P6.1/A1 bidirectional General-purpose digital I/O or 12-bit ADC analog input channel A1.
61 P6.2/A2 bidirectional General-purpose digital I/O or 12-bit ADC analog input channel A2.
62 AVSS power_in Analog power supply ground, negative terminal for ADC12 analog circuitry.
63 DVSS power_in Digital power supply ground, negative terminal for all digital components.
64 AVCC power_in Analog power supply voltage positive terminal, +1.8V to +3.6V, powers ADC12 analog circuitry.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package LQFP-64(10x10)
Category Embedded Processors & Controllers
Pins 64

CAD (KiCad official)

  • Symbol: MSP430f235TPMR
  • Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
  • 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: msp430f235tpmr-etched.step / msp430f235tpmr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); msp430f235tpmr.step / msp430f235tpmr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (102 pp, sha256 841108068ef96d3c, retrieved 2026-09-23, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF