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LT1468CS8#TRPBF

Analog Devices · Operational Amplifier · SO-8

LT1468CS8#TRPBF from Analog Devices, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NULL passive Offset null terminal used with the suggested external nulling circuit, which the datasheet states must be removed when the part replaces an op amp that already has nulling.
2 -IN input Inverting input; the datasheet trims its bias current at zero common mode voltage and gives a maximum (-) input bias current of 10nA, and inputs are protected by 100Ω series resistors with back-to-back diodes limited to 10mA.
3 +IN input Noninverting input with an input voltage range of -14.3V to 13.5V at ±15V supplies, and the datasheet states its bias current is not trimmed and has a wider variation.
4 V- power_in Negative supply pin; the datasheet specifies operation at ±5V and ±15V with total supply voltage (V+ to V-) of 36V maximum.
5 NULL passive Offset null terminal used with the suggested external nulling circuit, paired with pin 1.
6 OUT output Amplifier output, which the datasheet specifies to swing to ±12.8V minimum into a 2k load at ±15V supplies and to drive up to 100pF of capacitive load in unity gain.
7 V+ power_in Positive supply pin; the input common mode range extends to within 0.5V of V+ before phase reversal occurs.
8 DNC unconnected Do not connect; the datasheet states to make no connection to this pin, which is used for factory trim of the inverting input current.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package SO-8
Category Amplifiers
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Maximum Input Current 10 mA Note 2 2
Operating Temperature Range -40 85 °C Specified temperature range, Note 4 2
Junction Temperature 150 °C 2
Storage Temperature Range -65 150 °C 2
Lead Temperature (Soldering, 10 sec) 300 °C Soldering, 10 sec 2
Thermal Resistance Junction-to-Ambient (S8) θJA 190 °C/W S8 package 2
Input Offset Voltage (N8, S8) VOS 30 75 μV VSUPPLY ±15V, TA = 25°C, VCM = 0V 3
Input Offset Voltage (N8, S8) VOS 50 175 μV VSUPPLY ±5V, TA = 25°C, VCM = 0V 3
Input Offset Current IOS 13 50 nA ±5V to ±15V, TA = 25°C 3
Inverting Input Bias Current IB- -10 3 10 nA ±5V to ±15V, TA = 25°C 3
Noninverting Input Bias Current IB+ -10 40 nA ±5V to ±15V, TA = 25°C 3
Input Voltage Range + 12.5 13.5 V VSUPPLY ±15V 3
Input Voltage Range + 2.5 3.5 V VSUPPLY ±5V 3
Input Voltage Range - -14.3 -12.5 V VSUPPLY ±15V 3
Input Voltage Range - -4.3 -2.5 V VSUPPLY ±5V 3
Common Mode Rejection Ratio CMRR 96 110 dB VCM = ±12.5V, VSUPPLY ±15V 3
Common Mode Rejection Ratio CMRR 96 112 dB VCM = ±2.5V, VSUPPLY ±5V 3
Power Supply Rejection Ratio PSRR 100 112 dB VS = ±4.5V to ±15V 3
Large-Signal Voltage Gain AVOL 1000 9000 V/mV VOUT = ±12.5V, RL = 10k, VSUPPLY ±15V 3
Large-Signal Voltage Gain AVOL 500 5000 V/mV VOUT = ±12.5V, RL = 2k, VSUPPLY ±15V 3
Large-Signal Voltage Gain AVOL 1000 6000 V/mV VOUT = ±2.5V, RL = 10k, VSUPPLY ±5V 3
Large-Signal Voltage Gain AVOL 500 3000 V/mV VOUT = ±2.5V, RL = 2k, VSUPPLY ±5V 3
Output Swing VOUT 13 13.6 V RL = 10k, VSUPPLY ±15V 3
Output Swing VOUT 12.8 13.5 V RL = 2k, VSUPPLY ±15V 3
Output Swing VOUT 3 3.6 V RL = 10k, VSUPPLY ±5V 3
Output Swing VOUT 2.8 3.5 V RL = 2k, VSUPPLY ±5V 3
Output Current IOUT 15 22 mA VOUT = ±12.5V, VSUPPLY ±15V 3
Short-Circuit Current ISC 25 40 mA VOUT = 0V, VIN = ±0.2V, VSUPPLY ±15V 3
Slew Rate SR 15 22 V/μs AV = -1, RL = 2k, VSUPPLY ±15V 3
Slew Rate SR 11 17 V/μs AV = -1, RL = 2k, VSUPPLY ±5V 3
Gain Bandwidth GBW 60 90 MHz f = 100kHz, RL = 2k, VSUPPLY ±15V 3
Gain Bandwidth GBW 55 88 MHz f = 100kHz, RL = 2k, VSUPPLY ±5V 3
Supply Current IS 3.9 5.2 mA VSUPPLY ±15V, TA = 25°C 4
Supply Current IS 3.6 5 mA VSUPPLY ±5V, TA = 25°C 4
Input Offset Voltage (N8, S8) over temperature VOS 150 μV VSUPPLY ±15V, 0°C ≤ TA ≤ 70°C (l rows) 4
Input Offset Voltage (N8, S8) over temperature VOS 250 μV VSUPPLY ±5V, 0°C ≤ TA ≤ 70°C (l rows) 4
Input VOS Drift 0.7 2 μV/°C ±5V to ±15V, 0°C ≤ TA ≤ 70°C (not 100% tested) 4
Input Offset Current over temperature IOS 65 nA ±5V to ±15V, 0°C ≤ TA ≤ 70°C 4
Inverting Input Bias Current over temperature IB- -15 15 nA ±5V to ±15V, 0°C ≤ TA ≤ 70°C 4
Noninverting Input Bias Current over temperature IB+ -50 50 nA ±5V to ±15V, 0°C ≤ TA ≤ 70°C 4
Common Mode Rejection Ratio over temperature CMRR 94 dB VCM = ±12.5V, VSUPPLY ±15V, 0°C ≤ TA ≤ 70°C 4
Power Supply Rejection Ratio over temperature PSRR 98 dB VS = ±4.5V to ±15V, 0°C ≤ TA ≤ 70°C 4
Slew Rate over temperature SR 13 V/μs AV = -1, RL = 2k, VSUPPLY ±15V, 0°C ≤ TA ≤ 70°C 4
Gain Bandwidth over temperature GBW 55 MHz f = 100kHz, RL = 2k, VSUPPLY ±15V, 0°C ≤ TA ≤ 70°C 4
Settling Time ts 760 ns 10V Step, 0.01%, AV = -1, VSUPPLY ±15V 4
Settling Time ts 900 ns 10V Step, 150μV, AV = -1, VSUPPLY ±15V 4
Output Resistance RO 0.02 Ω AV = 1, f = 100kHz, VSUPPLY ±15V 4
Input Noise Voltage en 5 nV/√Hz f = 10kHz, ±5V to ±15V 3
Input Noise Current in 0.6 pA/√Hz f = 10kHz, ±5V to ±15V 3
Input Resistance (common mode) RIN 100 240 MΩ VCM = ±12.5V, VSUPPLY ±15V 3
Input Resistance (differential) RIN 50 150 kΩ Differential, VSUPPLY ±15V 3
Input Capacitance CIN 4 pF VSUPPLY ±15V 3

CAD (KiCad official)

  • Symbol: LT1468CS8#TRPBF
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: lt1468cs8-trpbf-etched.step / lt1468cs8-trpbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lt1468cs8-trpbf.step / lt1468cs8-trpbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (16 pp, sha256 fa6df612fa2692aa, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF