component
TLV74325PDBVR-MS
Public Made by Adomby adom
MSKSEMI Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTLV74325PDBVR-MS
MSKSEMI · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5
TLV74325PDBVR-MS from MSKSEMI, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Input supply pin, which must be kept within the 1.2 V to 5.5 V recommended input voltage range, with a 1 µF or larger input capacitor placed close to the VIN and GND pins. |
| 2 | GND | power_in | Ground pin, to which the input and output capacitor ground connections must return through short, wide traces. |
| 3 | EN | input | Enable control pin, where pulling EN low (VIL max 0.4 V) shuts the output off into a shutdown current of 0.1 µA typical, and EN high requires at least 1.0 V (VIH min), with EN input current of 10 nA typical and 100 nA maximum at VEN = 5 V. |
| 4 | NC | unconnected | No-connect pin, described in the datasheet as a floating pin with no internal connection. |
| 5 | VOUT | power_out | Regulated output pin, which supplies up to 300 mA with ±2% output voltage accuracy and must have a 1 µF to 22 µF effective output capacitor placed close to the VOUT and GND pins. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | MSKSEMI |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage | VIN | 1.2 | 5.5 | V | 6 | ||
| Output voltage accuracy | -2 | 2 | % | ILOAD = 0.1mA | 6 | ||
| Shutdown current | ISD | 0.1 | 0.5 | μA | VEN = 0V, VOUT = 0V | 6 | |
| EN input current | IEN | 10 | 100 | nA | VEN = 5V | 6 | |
| Output current limit | ILIM | 301 | 600 | mA | VOUT = 0V | 6 | |
| Input voltage (recommended) | VIN | 1.2 | 5.5 | V | 5 | ||
| Operating junction temperature range | TJ | -40 | 125 | °C | 5 | ||
| Operating ambient temperature range | TA | -40 | 85 | °C | 5 | ||
| VIN to GND voltage | VIN | -0.3 | 7 | V | 5 | ||
| VOUT, EN to GND voltage | VOUT, EN | -0.3 | 6 | V | 5 | ||
| VOUT to VIN voltage | VOUT to VIN | -6 | 0.3 | V | 5 | ||
| Junction temperature | TJ | 150 | °C | 5 | |||
| Storage temperature range | TSTG | -60 | 150 | °C | 5 | ||
| Lead soldering temperature | 260 | °C | 10 s soldering | 5 | |||
| ESD HBM | HBM | 2 | KV | 5 | |||
| ESD MM | MM | 200 | V | 5 | |||
| ESD CDM | CDM | 2 | KV | 5 | |||
| Junction-to-ambient thermal resistance | θJA | 200 | °C/W | TA = 25°C, EVB board (Note 2) | 5 |
CAD (KiCad official)
- Symbol:
TLV74325PDBVR-MS - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
tlv74325pdbvr-ms-etched.step/tlv74325pdbvr-ms-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tlv74325pdbvr-ms.step/tlv74325pdbvr-ms.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: MSKSEMI datasheet (12 pp, sha256
98aebd03594f279c, retrieved 2026-10-19, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).