ATSAMD21G16B-AU from Microchip Tech, in a TQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model). Symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	PA00	bidirectional	PORT group A general-purpose I/O in the VDDANA domain, also EXTINT[0] and the XIN32 32 kHz crystal input when the 32 kHz oscillator is enabled (Table 7-3).
2	PA01	bidirectional	PORT group A general-purpose I/O in the VDDANA domain, also EXTINT[1] and the XOUT32 32 kHz crystal output when the 32 kHz oscillator is enabled (Table 7-3).
3	PA02	bidirectional	PORT group A I/O in the VDDANA domain with EXTINT[2], analog input AIN[0], and DAC output VOUT; analog functions require peripheral function B to be selected to disable digital control of the pin.
4	PA03	bidirectional	PORT group A I/O in the VDDANA domain with EXTINT[3], analog input AIN[1], and DAC/VREFA external reference; analog functions require peripheral function B to be selected.
5	GNDANA	power_in	Ground return for the analog domain, paired with VDDANA (pin 6).
6	VDDANA	power_in	Analog supply for the ADC, DAC and analog comparators; the SAM D21 operating voltage is stated as 1.62V to 3.63V.
7	PB08	bidirectional	PORT group B I/O in the VDDANA domain with EXTINT[8], analog input AIN[2], PTC Y[14], SERCOM4/PAD[0] and TC4/WO[0].
8	PB09	bidirectional	PORT group B I/O in the VDDANA domain with EXTINT[9], analog input AIN[3], PTC Y[15], SERCOM4/PAD[1] and TC4/WO[1].
9	PA04	bidirectional	PORT group A I/O in the VDDANA domain with EXTINT[4], ADC/VREFB reference, analog input AIN[4], SERCOM0/PAD[0] and TCC0/WO[0].
10	PA05	bidirectional	PORT group A I/O in the VDDANA domain with EXTINT[5], analog input AIN[5], SERCOM0/PAD[1] and TCC0/WO[1].
11	PA06	bidirectional	PORT group A I/O in the VDDANA domain with EXTINT[6], analog input AIN[6], SERCOM0/PAD[2] and TCC1/WO[0].
12	PA07	bidirectional	PORT group A I/O in the VDDANA domain with EXTINT[7], analog input AIN[7], SERCOM0/PAD[3] and TCC1/WO[1].
13	PA08	bidirectional	PORT group A I/O in the VDDIO domain with NMI, analog input AIN[16], PTC X[0], SERCOM0/PAD[0], SERCOM2/PAD[0] and TCC0/WO[0]; supports I2C per Table 7-5.
14	PA09	bidirectional	PORT group A I/O in the VDDIO domain with EXTINT[9], analog input AIN[17], PTC X[1], SERCOM0/PAD[1], SERCOM2/PAD[1] and TCC0/WO[1]; supports I2C per Table 7-5.
15	PA10	bidirectional	PORT group A I/O in the VDDIO domain with EXTINT[10], analog input AIN[18], PTC X[2], SERCOM0/PAD[2], SERCOM2/PAD[2] and TCC1/WO[0].
16	PA11	bidirectional	PORT group A I/O in the VDDIO domain with EXTINT[11], analog input AIN[19], PTC X[3], SERCOM0/PAD[3], SERCOM2/PAD[3] and TCC1/WO[1].
17	VDDIO	power_in	Digital I/O supply for the I/O pins of this group; the SAM D21 operating voltage is stated as 1.62V to 3.63V.
18	GND	power_in	Digital ground for the I/O ring, paired with VDDIO (pin 17).
19	PB10	bidirectional	PORT group B I/O in the VDDIO domain with EXTINT[10], SERCOM4/PAD[2], TC5/WO[0], TCC0/WO[4], I2S/MCK[1] and GCLK_IO[4].
20	PB11	bidirectional	PORT group B I/O in the VDDIO domain with EXTINT[11], SERCOM4/PAD[3], TC5/WO[1], TCC0/WO[5], I2S/SCK[1] and GCLK_IO[5].
21	PA12	bidirectional	PORT group A I/O in the VDDIO domain with EXTINT[12], SERCOM2/PAD[0], SERCOM4/PAD[0], TCC2/WO[0], TCC0/WO[6] and AC/CMP[0].
22	PA13	bidirectional	PORT group A I/O in the VDDIO domain with EXTINT[13], SERCOM2/PAD[1], SERCOM4/PAD[1], TCC2/WO[1], TCC0/WO[7] and AC/CMP[1].
23	PA14	bidirectional	PORT group A I/O in the VDDIO domain with EXTINT[14], SERCOM2/PAD[2], SERCOM4/PAD[2], TC3/WO[0], TCC0/WO[4] and GCLK_IO[0]; also the XIN input of the main crystal oscillator (Table 7-3).
24	PA15	bidirectional	PORT group A I/O in the VDDIO domain with EXTINT[15], SERCOM2/PAD[3], SERCOM4/PAD[3], TC3/WO[1], TCC0/WO[5] and GCLK_IO[1]; also the XOUT output of the main crystal oscillator (Table 7-3).
25	PA16	bidirectional	PORT group A I/O in the VDDIO domain with EXTINT[0], PTC X[4], SERCOM1/PAD[0], SERCOM3/PAD[0], TCC2/WO[0], TCC0/WO[6] and GCLK_IO[2].
26	PA17	bidirectional	PORT group A I/O in the VDDIO domain with EXTINT[1], PTC X[5], SERCOM1/PAD[1], SERCOM3/PAD[1], TCC2/WO[1], TCC0/WO[7] and GCLK_IO[3].
27	PA18	bidirectional	PORT group A I/O in the VDDIO domain with EXTINT[2], PTC X[6], SERCOM1/PAD[2], SERCOM3/PAD[2], TC3/WO[0], TCC0/WO[2] and AC/CMP[0].
28	PA19	bidirectional	PORT group A I/O in the VDDIO domain with EXTINT[3], PTC X[7], SERCOM1/PAD[3], SERCOM3/PAD[3], TC3/WO[1], TCC0/WO[3], I2S/SD[0] and AC/CMP[1].
29	PA20	bidirectional	PORT group A I/O in the VDDIO domain with EXTINT[4], PTC X[8], SERCOM5/PAD[2], SERCOM3/PAD[2], TC7/WO[0], TCC0/WO[6], I2S/SCK[0] and GCLK_IO[4].
30	PA21	bidirectional	PORT group A I/O in the VDDIO domain with EXTINT[5], PTC X[9], SERCOM5/PAD[3], SERCOM3/PAD[3], TC7/WO[1], TCC0/WO[7], I2S/FS[0] and GCLK_IO[5]; the name is taken from the G-series column of Table 7-1 because the page 21 pin text omits it.
31	PA22	bidirectional	PORT group A I/O in the VDDIO domain with EXTINT[6], PTC X[10], SERCOM3/PAD[0], SERCOM5/PAD[0], TC4/WO[0], TCC0/WO[4] and GCLK_IO[6]; supports I2C per Table 7-5.
32	PA23	bidirectional	PORT group A I/O in the VDDIO domain with EXTINT[7], PTC X[11], SERCOM3/PAD[1], SERCOM5/PAD[1], TC4/WO[1], TCC0/WO[5], USB SOF 1kHz and GCLK_IO[7]; supports I2C per Table 7-5.
33	PA24	bidirectional	USB DM data line with EXTINT[12], SERCOM3/PAD[2], SERCOM5/PAD[2], TC5/WO[0] and TCC1/WO[2]; if unconnected, a pull-up is recommended to avoid power draw below 1 mA, and this pin has no drive strength option.
34	PA25	bidirectional	USB DP data line with EXTINT[13], SERCOM3/PAD[3], SERCOM5/PAD[3], TC5/WO[1] and TCC1/WO[3]; if unconnected, a pull-up is recommended to avoid power draw below 1 mA, and this pin has no drive strength option.
35	GND	power_in	Digital ground for the I/O ring.
36	VDDIO	power_in	Digital I/O supply for the I/O pins of this group; the SAM D21 operating voltage is stated as 1.62V to 3.63V.
37	PB22	bidirectional	PORT group B I/O in the VDDIO domain with EXTINT[6], SERCOM5/PAD[2], TC7/WO[0], TCC3/WO[0] and GCLK_IO[0].
38	PB23	bidirectional	PORT group B I/O in the VDDIO domain with EXTINT[7], SERCOM5/PAD[3], TC7/WO[1], TCC3/WO[1] and GCLK_IO[1].
39	PA27	bidirectional	PORT group A I/O in the VDDIO domain with EXTINT[15], TCC3/WO[6] and GCLK_IO[0].
40	RESET	input	Active-low external reset input for the device.
41	PA28	bidirectional	PORT group A I/O in the VDDIO domain with EXTINT[8], TCC3/WO[7] and GCLK_IO[0].
42	GND	power_in	Digital ground for the core and I/O domain, paired with VDDCORE and VDDIN.
43	VDDCORE	power_out	Regulated output of the internal voltage regulator that supplies the core; the datasheet pin legend classifies it as a regulated output supply, not an input.
44	VDDIN	power_in	Input supply to the internal voltage regulator; the SAM D21 operating voltage is stated as 1.62V to 3.63V.
45	PA30	bidirectional	PORT group A I/O in the VDDIO domain with EXTINT[10], SERCOM1/PAD[2], TCC1/WO[0], TCC3/WO[4], GCLK_IO[0] and the SWCLK Serial Wire Debug clock (Table 7-4).
46	PA31	bidirectional	PORT group A I/O in the VDDIO domain with EXTINT[11], SERCOM1/PAD[3], TCC1/WO[1], TCC3/WO[5] and the SWDIO Serial Wire Debug data line, which is only activated when a debugger is present.
47	PB02	bidirectional	PORT group B I/O in the VDDANA domain with EXTINT[2], analog input AIN[10], PTC Y[8], SERCOM5/PAD[0], TC6/WO[0] and TCC3/WO[2].
48	PB03	bidirectional	PORT group B I/O in the VDDANA domain with EXTINT[3], analog input AIN[11], PTC Y[9], SERCOM5/PAD[1], TC6/WO[1] and TCC3/WO[3].

Key specifications

Parameter	Value
Manufacturer	Microchip Tech
Package	TQFP-48(7x7)
Category	Embedded Processors & Controllers
Pins	48

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Max	Unit	Conditions	Page
VDDIO supply voltage	VDDIO	1.62	3.63	V	Powers I/O lines, OSC8M and XOSC	35
VDDIN supply voltage	VDDIN	1.62	3.63	V	Powers I/O lines and the internal regulator	35
VDDANA supply voltage	VDDANA	1.62	3.63	V	Powers I/O lines, ADC, AC, DAC, PTC, OSCULP32K, OSC32K, XOSC32K	35
Operating temperature (ordering grade U)		-40	85	°C	Package grade U = -40 to 85°C per SAM D21 ordering code; MPN suffix -AU	16

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part	Material	Colour / plating	Datasheet says	Page
contacts		tin	including indium tin oxide (ITO) sensor grids. The PTC requires one pin per X-line and one pin per Y-line. In the self-capacitance mode, the PTC requires only one pin (Y-line) for each touch sensor.	859

CAD (KiCad official)

Symbol: ATSAMD21G16B-AU
Footprint: Package_QFP:TQFP-48_7x7mm_P0.5mm
3D model: TQFP-48(7x7) (KiCad packages3D, STEP)
3D model files: atsamd21g16b-au-etched.step / atsamd21g16b-au-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); atsamd21g16b-au.step / atsamd21g16b-au.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Microchip Tech datasheet (1148 pp, sha256 18ca1ccab5aa330f, retrieved 2026-11-13, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

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