component
SN75471DR
Public Made by Adomby adom
Texas Instruments Buffer/Driver/Transceiver, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownSN75471DR
Texas Instruments · Buffer/Driver/Transceiver · SOIC-8
SN75471DR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Driver 1 input A, TTL-compatible diode-clamped input with VIH min 2 V, VIL max 0.8 V and absolute maximum input voltage 5.5 V. |
| 2 | 1B | input | Driver 1 input B, TTL-compatible diode-clamped input with VIH min 2 V, VIL max 0.8 V and absolute maximum input voltage 5.5 V. |
| 3 | 1Y | output | Driver 1 npn output (AND logic, Y = A·B), off-state output voltage up to 70 V and continuous output current up to 400 mA. |
| 4 | GND | power_in | Ground, the network reference for all voltage values. |
| 5 | 2Y | output | Driver 2 npn output (AND logic, Y = A·B), off-state output voltage up to 70 V and continuous output current up to 400 mA. |
| 6 | 2A | input | Driver 2 input A, TTL-compatible diode-clamped input with VIH min 2 V, VIL max 0.8 V and absolute maximum input voltage 5.5 V. |
| 7 | 2B | input | Driver 2 input B, TTL-compatible diode-clamped input with VIH min 2 V, VIL max 0.8 V and absolute maximum input voltage 5.5 V. |
| 8 | VCC | power_in | Supply voltage, recommended 4.75 V to 5.25 V (5 V nominal) with absolute maximum of 7 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Logic ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | 7 | V | see Note 1 | 2 | ||
| Input voltage | VI | 5.5 | V | 2 | |||
| Inter-emitter voltage | 5.5 | V | see Note 2 | 2 | |||
| Off-state output voltage | VO | 70 | V | 2 | |||
| Continuous collector or output current | 400 | mA | see Note 3 | 2 | |||
| Peak collector or output current | 500 | mA | tw ≤ 10 ms, duty cycle ≤ 50%, see Note 3 | 2 | |||
| Operating free-air temperature range | TA | 0 | 70 | °C | 2 | ||
| Storage temperature range | Tstg | -65 | 150 | °C | 2 | ||
| Lead temperature | 260 | °C | 1.6 mm (1/16 inch) from case for 10 seconds | 2 | |||
| Continuous total power dissipation, D package | 725 | mW | D package, TA ≤ 25°C | 2 | |||
| Continuous total power dissipation, D package | 464 | mW | D package, TA = 70°C | 2 | |||
| Supply voltage | VCC | 4.75 | 5 | 5.25 | V | 2 | |
| High-level input voltage | VIH | 2 | V | 2 | |||
| Low-level input voltage | VIL | 0.8 | V | 2 | |||
| Operating free-air temperature | TA | 0 | 70 | °C | 2 | ||
| Input clamp voltage | VIK | -1.2 | -1.5 | V | VCC = 4.75 V, II = -12 mA | 3 | |
| High-level output current | IOH | 100 | µA | VCC = 4.75 V, VIH = 2 V, VOH = 70 V | 3 | ||
| Low-level output voltage | VOL | 0.25 | 0.4 | V | VCC = 4.75 V, VIL = 0.8 V, IOL = 100 mA | 3 | |
| Low-level output voltage | VOL | 0.5 | 0.7 | V | VCC = 4.75 V, VIL = 0.8 V, IOL = 300 mA | 3 | |
| Input current at maximum input voltage | II | 1 | mA | VCC = 5.25 V, VI = 5.5 V | 3 | ||
| High-level input current | IIH | 40 | µA | VCC = 5.25 V, VI = 2.4 V | 3 | ||
| Low-level input current | IIL | -1 | -1.6 | mA | VCC = 5.25 V, VI = 0.4 V | 3 | |
| Supply current, outputs high | ICCH | 7 | 11 | mA | VCC = 5.25 V, VI = 5 V | 3 | |
| Supply current, outputs low | ICCL | 52 | 65 | mA | VCC = 5.25 V, VI = 0 | 3 | |
| Propagation delay time, low-to-high-level output | tPLH | 30 | 55 | ns | VCC = 5 V, TA = 25°C; IO ≈ 200 mA, CL = 15 pF, RL = 50 Ω, see Figure 1 | 3 | |
| Propagation delay time, high-to-low-level output | tPHL | 25 | 40 | ns | VCC = 5 V, TA = 25°C; IO ≈ 200 mA, CL = 15 pF, RL = 50 Ω, see Figure 1 | 3 | |
| Transition time, low-to-high-level output | tTLH | 8 | 20 | ns | VCC = 5 V, TA = 25°C; IO ≈ 200 mA, CL = 15 pF, RL = 50 Ω, see Figure 1 | 3 | |
| Transition time, high-to-low-level output | tTHL | 10 | 20 | ns | VCC = 5 V, TA = 25°C; IO ≈ 200 mA, CL = 15 pF, RL = 50 Ω, see Figure 1 | 3 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | Copper | Plastic DIP (P) With Copper Lead Frame | 1 |
CAD (KiCad official)
- Symbol:
SN75471DR - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
sn75471dr-etched.step/sn75471dr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn75471dr.step/sn75471dr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (16 pp, sha256
57b4a25ea2b24613, retrieved 2026-10-31, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).