RT9069-33GB
Public Made by Adomby adom
Richtek Tech Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
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README
markdownRT9069-33GB
Richtek Tech · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5
RT9069-33GB from Richtek Tech, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Supply voltage input. Operating range 3.5V to 36V (absolute max −0.3V to 40V). Bypass with a low-ESR ceramic capacitor close to the pin. |
| 2 | GND | power_in | Device ground return. Provides the reference for VCC, EN, and VOUT. |
| 3 | NC | unconnected | No internal connection. Leave floating or tie to GND per PCB preference. |
| 4 | EN | input | Enable control input. Logic-high (VIH ≥ 1.6V typ threshold, min for high state) enables regulation; logic-low (VIL ≤ 0.6V) disables output with zero quiescent current. Absolute max −0.3V to 40V, typical EN input current 0.1µA at 36V. |
| 5 | VOUT | power_out | Regulated output of the LDO. Fixed 3.3V for the -33 option, up to 200mA. Requires ≥1µF effective ceramic (or tantalum) output capacitor for stability. Absolute max −0.3V to 6V for -25/-30/-33/-50 options. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Richtek Tech |
| Package | SOT-23-5 |
| Category | PMIC |
| Pins | 5 |
Ordering variants
Same part, different packaging or reel option.
RT9069-33GBBRT9069-33GBSPRT9069-33GBX5RT9069-33GBQU
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VCC | 3.5 | 36 | V | 4 | ||
| Output Voltage Range | VOUT | 2.5 | 12 | V | 4 | ||
| DC Output Accuracy | VOUT | -2 | 2 | % | ILOAD = 10mA | 4 | |
| Dropout Voltage | VDROP | 0.2 | 0.36 | V | ILOAD = 10mA, VCC > 5V | 4 | |
| VCC Consumption Current | IQ | 2 | 3.5 | μA | ILOAD = 0mA, VOUT 5.5V | 5 | |
| Line Regulation | VLINE | 0.04 | 0.5 | % | ILOAD = 1mA, VOUT +1 < VCC < 36V, VOUT 3.3V | 5 | |
| Load Regulation | VLOAD | -1 | 1 | % | 0mA < ILOAD < 100mA | 5 | |
| Output Current Limit | ILIM | 200 | 350 | mA | VOUT = 0.5 x VOUT(normal) | 5 | |
| Enable Input Voltage Logic-High | VIH | 1.6 | V | 5 | |||
| Enable Input Voltage Logic-Low | VIL | 0.6 | V | 5 | |||
| VCC, EN to GND | -0.3 | 40 | V | 4 | |||
| VOUT to VCC | -40 | 0.3 | V | 4 | |||
| VOUT to GND (RT9069-25/30/33/50) | -0.3 | 6 | V | RT9069-33 variant | 4 | ||
| Power Dissipation, SOT-23-5 | PD | 0.45 | W | TA = 25°C | 4 | ||
| Junction Temperature | 150 | °C | 4 | ||||
| Lead Temperature (Soldering) | 260 | °C | 10 sec. | 4 | |||
| Storage Temperature Range | -65 | 150 | °C | 4 | |||
| ESD Susceptibility HBM | 2 | kV | HBM (Human Body Model) | 4 | |||
| Supply Input Voltage | 3.5 | 36 | V | 4 | |||
| Junction Temperature Range | -40 | 125 | °C | 4 | |||
| Ambient Temperature Range | -40 | 85 | °C | 4 | |||
| Junction-to-Ambient Thermal Resistance, SOT-23-5 | JA | 218.1 | °C/W | JEDEC 51-7 four-layer board, TA = 25°C | 4 | ||
| Junction-to-Case Thermal Resistance, SOT-23-5 | JC | 28.5 | °C/W | measured at exposed pad | 4 |
CAD (KiCad official)
- Symbol:
RT9069-33GB - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
rt9069-33gb-etched.step/rt9069-33gb-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);rt9069-33gb.step/rt9069-33gb.glbare the bare package body.
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
rt9069-33gb.step |
85 KB | You want the bare part, or you mark your own boards. |
rt9069-33gb-etched.step |
2.5 MB | You want the part with RT9069-33GB already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 589 faces against 102 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Richtek Tech datasheet (15 pp, sha256
d34d047a46b2071f, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).