component
cd14538bm96-jsm
Public Unreviewedby Ray
JSMSEMI Monostable Multivibrators, SOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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JSMSEMI · Monostable Multivibrators · SOP-16
CD14538BM96-JSM from JSMSEMI, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VSS | power_in | Negative supply / ground reference (0 V). Must be externally grounded per the datasheet note. |
| 2 | CX/RXA | passive | Timing network node A: external timing capacitor C_X connects between this pin and pin 3, and external timing resistor R_X connects between this pin and V_DD. Sets the monostable-A output pulse width T = R_X · C_X. |
| 3 | RESET_A | input | Active-low latched reset input for monostable A. A low level on this pin resets the output latch (Q low, Q-bar high) and inhibits triggering while held low. Logic thresholds V_IH ≈ 0.7·V_DD, V_IL ≈ 0.3·V_DD. |
| 4 | AA | input | A-trigger input for monostable A. Positive-going edge trigger; used with B held at V_DD for rising-edge triggering. Unlimited input rise/fall time allowed on the A trigger. |
| 5 | BA | input | B-trigger input for monostable A. Negative-going edge trigger; used with A held at V_SS for falling-edge triggering. |
| 6 | QA | output | True (non-inverted) output of monostable A. Drives high for pulse duration T = R_X · C_X after a valid trigger. Capable of driving two low-power TTL loads or one low-power Schottky TTL load. |
| 7 | QA_N | output | Complementary (inverted) output of monostable A. Drives low for pulse duration T after a valid trigger. |
| 8 | VSS | power_in | Negative supply / ground reference (0 V). Must be externally grounded per the datasheet note. |
| 9 | QB_N | output | Complementary (inverted) output of monostable B. Drives low for pulse duration T after a valid trigger. |
| 10 | QB | output | True (non-inverted) output of monostable B. Drives high for pulse duration T = R_X · C_X after a valid trigger. Capable of driving two low-power TTL loads or one low-power Schottky TTL load. |
| 11 | BB | input | B-trigger input for monostable B. Negative-going edge trigger; used with A held at V_SS for falling-edge triggering. |
| 12 | AB | input | A-trigger input for monostable B. Positive-going edge trigger; used with B held at V_DD for rising-edge triggering. Unlimited input rise/fall time allowed on the A trigger. |
| 13 | RESET_B | input | Active-low latched reset input for monostable B. A low level on this pin resets the output latch (Q low, Q-bar high) and inhibits triggering while held low. |
| 14 | CX/RXB | passive | Timing network node B: external timing capacitor C_X connects between this pin and pin 15, and external timing resistor R_X connects between this pin and V_DD. Sets the monostable-B output pulse width T = R_X · C_X. |
| 15 | VSS | power_in | Negative supply / ground reference (0 V). Must be externally grounded per the datasheet note. |
| 16 | VDD | power_in | Positive supply voltage input. Operating range 3.0 V to 18 V (absolute max 18.0 V). Bypass with a local ceramic capacitor (e.g. 0.1 µF) close to the pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | JSMSEMI |
| Package | SOP-16 |
| Category | Logic |
| Pins | 16 |
Ordering variants
CD14538BM96-JSM
CAD (KiCad official)
- Symbol:
CD14538BM96-JSM - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOP-16 (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: JSMSEMI datasheet (None pp, sha256
677a586be2dbd80b, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).