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Contents

README

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CMU5N60

Cmos · MOSFETs · TO-251

CMU5N60 from Cmos, in a TO-251. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate; gate-source voltage is rated ±30 V, with a gate threshold of 3.0 to 5.0 V at VDS = VGS, ID = 250 µA.
2 D passive Drain; drain-source voltage is rated 600 V, with continuous drain current of 4.5 A at TC = 25℃ and 18 A pulsed.
3 S passive Source; the body diode runs from source to drain, with a continuous forward current of 4.5 A.

Key specifications

Parameter Value
Manufacturer Cmos
Package TO-251
Category Triode/MOS Tube/Transistor
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Breakdown Voltage BVDSS 600 V VGS = 0 V, ID = 250 µA 2
Zero Gate Voltage Drain Current IDSS 1 µA VDS = 600 V, VGS = 0 V 2
Zero Gate Voltage Drain Current (TC = 125℃) IDSS 10 µA VDS = 480 V, TC = 125℃ 2
Gate-Body Leakage Current, Forward IGSSF 100 nA VGS = 30 V, VDS = 0 V 2
Gate-Body Leakage Current, Reverse IGSSR -100 nA VGS = -30 V, VDS = 0 V 2
Gate Threshold Voltage VGS(th) 3 5 V VDS = VGS, ID = 250 µA 2
Static Drain-Source On-Resistance RDS(on) 2.2 2.5 Ω VGS = 10 V, ID = 2.25 A 2
Maximum Continuous Drain-Source Diode Forward Current IS 4.5 A 2
Maximum Pulsed Drain-Source Diode Forward Current ISM 18 A 2
Drain-Source Diode Forward Voltage VSD 1.4 V VGS = 0 V, IS = 4.5 A 2
Drain-Source Voltage VDSS 600 V TC = 25℃ 1
Drain Current - Continuous ID 4.5 A TC = 25℃ 1
Drain Current - Continuous ID 2.6 A TC = 100℃ 1
Drain Current - Pulsed IDM 18 A TC = 25℃ 1
Gate-Source Voltage VGSS -30 30 V TC = 25℃ 1
Single Pulsed Avalanche Energy EAS 270 mJ TC = 25℃ 1
Avalanche Current IAR 4.5 A TC = 25℃ 1
Repetitive Avalanche Energy EAR 4.9 mJ TC = 25℃ 1
Peak Diode Recovery dv/dt dv/dt 4.5 V/ns TC = 25℃ 1
Power Dissipation PD 54 W TC = 25℃ 1
Operating and Storage Temperature Range TJ, TSTG -55 150 ℃ 1
Maximum lead temperature for soldering purposes TL 300 ℃ 1/8 from case for 5 seconds 1
Thermal Resistance, Junction-to-Case RθJC 2.31 ℃/W 1
Thermal Resistance, Junction-to-Ambient RθJA 110 ℃/W 1

CAD (KiCad official)

  • Symbol: CMU5N60
  • Footprint: Package_TO_SOT_THT:TO-251-3_Vertical
  • 3D model: TO-251 (KiCad packages3D, STEP)
  • 3D model files: cmu5n60-etched.step / cmu5n60-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cmu5n60.step / cmu5n60.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Cmos datasheet (3 pp, sha256 6fdbd5e97443335f, retrieved 2026-11-07, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF