component
SN74ABT377APWR
Public Made by Adomby adom
Texas Instruments Flip Flops, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN74ABT377APWR
Texas Instruments · Flip Flops · TSSOP-20
SN74ABT377APWR from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CLKEN | input | Common clock-enable input: when low, D data is transferred to Q on the positive-going CLK edge, and the circuit is designed to prevent false clocking from CLKEN transitions. |
| 2 | 1Q | output | Flip-flop 1 output, which holds its previous state (Q0) while CLKEN is high; high-drive output rated at -32 mA IOH and 64 mA IOL. |
| 3 | 1D | input | Data input for flip-flop 1, captured on the CLK rising edge when CLKEN is low and meeting the setup and hold times in the timing requirements. |
| 4 | 2D | input | Data input for flip-flop 2, captured on the CLK rising edge when CLKEN is low and meeting the setup and hold times in the timing requirements. |
| 5 | 2Q | output | Flip-flop 2 output, which holds its previous state (Q0) while CLKEN is high; high-drive output rated at -32 mA IOH and 64 mA IOL. |
| 6 | 3Q | output | Flip-flop 3 output, which holds its previous state (Q0) while CLKEN is high; high-drive output rated at -32 mA IOH and 64 mA IOL. |
| 7 | 3D | input | Data input for flip-flop 3, captured on the CLK rising edge when CLKEN is low and meeting the setup and hold times in the timing requirements. |
| 8 | 4D | input | Data input for flip-flop 4, captured on the CLK rising edge when CLKEN is low and meeting the setup and hold times in the timing requirements. |
| 9 | 4Q | output | Flip-flop 4 output, which holds its previous state (Q0) while CLKEN is high; high-drive output rated at -32 mA IOH and 64 mA IOL. |
| 10 | GND | power_in | Ground reference for the device. |
| 11 | CLK | input | Buffered clock input; the flip-flops trigger on the positive-going edge, and the D input has no effect when CLK is at either a high or low level. |
| 12 | 5Q | output | Flip-flop 5 output, which holds its previous state (Q0) while CLKEN is high; high-drive output rated at -32 mA IOH and 64 mA IOL. |
| 13 | 5D | input | Data input for flip-flop 5, captured on the CLK rising edge when CLKEN is low and meeting the setup and hold times in the timing requirements. |
| 14 | 6D | input | Data input for flip-flop 6, captured on the CLK rising edge when CLKEN is low and meeting the setup and hold times in the timing requirements. |
| 15 | 6Q | output | Flip-flop 6 output, which holds its previous state (Q0) while CLKEN is high; high-drive output rated at -32 mA IOH and 64 mA IOL. |
| 16 | 7Q | output | Flip-flop 7 output, which holds its previous state (Q0) while CLKEN is high; high-drive output rated at -32 mA IOH and 64 mA IOL. |
| 17 | 7D | input | Data input for flip-flop 7, captured on the CLK rising edge when CLKEN is low and meeting the setup and hold times in the timing requirements. |
| 18 | 8D | input | Data input for flip-flop 8, captured on the CLK rising edge when CLKEN is low and meeting the setup and hold times in the timing requirements. |
| 19 | 8Q | output | Flip-flop 8 output, which holds its previous state (Q0) while CLKEN is high; high-drive output rated at -32 mA IOH and 64 mA IOL. |
| 20 | VCC | power_in | Supply voltage, recommended range 4.5 V to 5.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-20 |
| Category | Logic |
| Pins | 20 |
CAD (KiCad official)
- Symbol:
SN74ABT377APWR - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files:
sn74abt377apwr-etched.step/sn74abt377apwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74abt377apwr.step/sn74abt377apwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (25 pp, sha256
37f5822de8187c3f, retrieved 2026-10-08, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).