A1454KLETR-4N-T from Allegro MicroSystems, LLC, in a TSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VCC	power_in	Device supply voltage pin; normal operation is specified from 2.65 V to 3.5 V (3.0 V typical), with a forward supply absolute maximum rating of 5.0 V.
2	ADR0	input	Address select pin 0; its voltage, as a fraction of VCC, sets the I2C device address bits per Table 9, with an input resistance of 0.8 to 1.2 MΩ.
3	GND	power_in	Device ground pin.
4	NC	unconnected	No connection.
5	NC	unconnected	No connection.
6	ADR1	input	Address select pin 1; its voltage, as a fraction of VCC, sets the I2C device address bits per Table 9, with an input resistance of 0.8 to 1.2 MΩ.
7	SDA	bidirectional	I2C serial data line operating as an open-drain input/output, with a forward voltage limit of 5.5 V, a VOL maximum of 0.36 V at 1.5 mA, and a total bus capacitance limit of 100 pF.
8	SCL	input	I2C serial clock input driven by the master, with a forward voltage limit of 5.5 V and a clock frequency up to 400 kHz.

Key specifications

Parameter	Value
Manufacturer	Allegro MicroSystems, LLC
Package	TSSOP-8
Category	Sensors
Pins	8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Forward Supply Voltage	VCC			5	V		2
Reverse Supply Voltage	VRCC	-0.1			V		2
Forward SCL Pin Voltage	VI2C(SCL)			5.5	V		2
Forward SDA Pin Voltage	VI2C(SDA)			5.5	V		2
Reverse SCL and SDA Voltage	VRI2C	-0.1			V		2
Operating Ambient Temperature	TA	-40		125	°C	Range K	2
Maximum Junction Temperature	TJ(max)			165	°C		2
Storage Temperature	Tstg	-65		170	°C		2
Supply Voltage, Normal Operation	VCC	2.65	3	3.5	V	Normal Operation	3
Supply Voltage, EEPROM programming	VCC	2.8		3.5	V	EEPROM programming	3
Supply Current, Active mode	ICC		2	5	mA	VCC = VCC(max), Active mode	3
Supply Current, Sleep mode	ICC		0.2	1	µA	VCC = VCC(max), Sleep mode	3
Supply Current, EEPROM programming occurring	ICC		2	5	mA	VCC = VCC(max), EEPROM programming occurring	3
Number of EEPROM Writes				1000	writes	Number of times the EEPROM can be written	3
Address Value 0 Reference	VADDR0		0	0.1	× VCC	ADR0, ADR1 Pins	3
Address Value 1 Reference	VADDR1	0.23	0.33	0.43	× VCC	ADR0, ADR1 Pins	3
Address Value 2 Reference	VADDR2	0.57	0.67	0.77	× VCC	ADR0, ADR1 Pins	3
Address Value 3 Reference	VADDR3	0.9	0.1		× VCC	ADR0, ADR1 Pins	3
Address Pin Input Resistance	RIN	0.8	1	1.2	MΩ	ADR0, ADR1 Pins	3
Factory-Programmed Quiescent Voltage Output	QVO	-10		10	LSB	Valid at TA = 25°C, VCC = 3.0 V, CBYPASS = 0.1 µF	4
Linearity Sensitivity Error	LinERR	-1		1	%	Valid at TA = 25°C, VCC = 3.0 V, CBYPASS = 0.1 µF	4
Sensitivity Error versus Temperature	SensErr	-3		3	%	TA = -40°C to 85°C	4
Sensitivity Error versus Temperature	SensErr	-6		6	%	TA = -40°C to 125°C	4
Bus Free Time Between Stop and Start	tBUF	1.3			µs	Valid at TA = 25°C, VCC = 3.0 V, REXT = 10 kΩ	5
Hold Time Start Condition	thdSTA	0.6			µs	Valid at TA = 25°C, VCC = 3.0 V, REXT = 10 kΩ	5
Setup Time for Repeated Start Condition	tsuSTA	0.6			µs	Valid at TA = 25°C, VCC = 3.0 V, REXT = 10 kΩ	5
SCL Low Time	tLOW	1.3			µs	Valid at TA = 25°C, VCC = 3.0 V, REXT = 10 kΩ	5
SCL High Time	tHIGH	0.6			µs	Valid at TA = 25°C, VCC = 3.0 V, REXT = 10 kΩ	5
Data Setup Time	tsuDAT	100			ns	Valid at TA = 25°C, VCC = 3.0 V, REXT = 10 kΩ	5
Data Hold Time	thdDAT	0		900	ns	Valid at TA = 25°C, VCC = 3.0 V, REXT = 10 kΩ	5
Setup Time for Stop Condition	tsuSTO	0.6			µs	Valid at TA = 25°C, VCC = 3.0 V, REXT = 10 kΩ	5
Logic Input Low Level (SDA, SCL pins)	VIL			30	%VCC	Valid at TA = 25°C, VCC = 3.0 V, REXT = 10 kΩ	5
Logic Input High Level (SDA, SCL pins)	VIH	70			%VCC	Valid at TA = 25°C, VCC = 3.0 V, REXT = 10 kΩ	5
Logic Input Current	IIN	-1	0	1	µA	VIN = 0 V to VCC	5
Output Voltage (SDA pin)	VOL			0.36	V	ILOAD = 1.5 mA	5
Clock Frequency (SCL pin)	fCLK			400	kHz	Valid at TA = 25°C, VCC = 3.0 V, REXT = 10 kΩ	5
Output Fall Time (SDA pin)	tf			250	ns	REXT = 10 kΩ, CB = 100 pF	5
I2C Pull-Up Resistance	REXT	2.4	10		kΩ	Valid at TA = 25°C, VCC = 3.0 V, REXT = 10 kΩ	5
Total Capacitive Load for Each of SDA and SCL Buses	CB			100	pF	Valid at TA = 25°C, VCC = 3.0 V, REXT = 10 kΩ	5
Package Thermal Resistance	RθJA		137		°C/W	On single-layer PCB with copper limited to solder pads	2

CAD (KiCad official)

Symbol: A1454KLETR-4N-T
Footprint: Package_SO:TSSOP-8_4.4x3mm_P0.65mm
3D model: TSSOP-8 (KiCad packages3D, STEP)
3D model files: a1454kletr-4n-t-etched.step / a1454kletr-4n-t-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); a1454kletr-4n-t.step / a1454kletr-4n-t.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Allegro MicroSystems, LLC datasheet (15 pp, sha256 1ce4853de1f896d5, retrieved 2026-11-06, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

A1454KLETR-4N-T

Verified A1454KLETR-4N-T

Verification log 1 record

3D Model

Symbol & Footprint

Schematic Symbol

PCB Footprint

Datasheet

README