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Contents

README

markdown

CMD5N50

Cmos · MOSFETs · TO-252

CMD5N50 from Cmos, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate; gate-source voltage is rated ±30 V and threshold VGS(th) is 2.0 to 4.5 V.
2 D passive Drain; drain-source voltage is rated 500 V with 4.5 A continuous drain current (15 A pulsed).
3 S passive Source; the body diode carries up to 4.5 A continuous (15 A pulsed) source-drain current.

Key specifications

Parameter Value
Manufacturer Cmos
Package TO-252
Category Triode/MOS Tube/Transistor
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDSS 500 V TC = 25℃ 1
Drain Current - Continuous (TC = 100℃) ID 2.9 A TC = 100℃ 1
Drain Current - Pulsed IDM 15 A Note 1 1
Gate-Source Voltage VGSS -30 30 V 1
Single Pulsed Avalanche Energy EAS 202 mJ Note 2 1
Power Dissipation PD 50 W TC = 25℃ 1
Operating and Storage Temperature Range TJ, TSTG -55 150 ℃ 1
Maximum lead temperature for soldering TL 300 ℃ 1/8 from case for 5 seconds 1
Thermal Resistance, Junction-to-Case RθJC 2.6 ℃/W 1
Thermal Resistance, Junction-to-Ambient RθJA 62.5 ℃/W 1
Drain-Source Breakdown Voltage BVDSS 500 V VGS = 0 V, ID = 250 µA 2
Zero Gate Voltage Drain Current IDSS 1 µA VDS = 500 V, VGS = 0 V 2
Gate-Body Leakage Current, Forward IGSSF 100 nA VGS = 30 V, VDS = 0 V 2
Gate-Body Leakage Current, Reverse IGSSR -100 nA VGS = -30 V, VDS = 0 V 2
Gate Threshold Voltage VGS(th) 2 4.5 V VDS = VGS, ID = 250 µA 2
Static Drain-Source On-Resistance RDS(on) 1.5 Ω VGS = 10 V, ID = 2.2A 2
Total Gate Charge Qg 18 30 nC VDS = 400 V, ID = 4.5 A, VGS = 10 V 2
Maximum Continuous Drain-Source Diode Forward Current IS 4.5 A 2
Maximum Pulsed Drain-Source Diode Forward Current ISM 15 A 2
Drain-Source Diode Forward Voltage VSD 1.4 V VGS = 0 V, IS = 1A 2
Forward Transconductance gFS 3.5 S VDS = 40 V, ID = 1.5A 2
Input Capacitance Ciss 750 pF VDS = 25 V, VGS = 0 V, f = 1.0 MHz 2
Output Capacitance Coss 80 pF VDS = 25 V, VGS = 0 V, f = 1.0 MHz 2
Reverse Transfer Capacitance Crss 15 pF VDS = 25 V, VGS = 0 V, f = 1.0 MHz 2
Turn-On Delay Time td(on) 15 ns VDD = 250 V, ID = 4.5 A, RG = 25 2
Turn-On Rise Time tr 40 ns VDD = 250 V, ID = 4.5 A, RG = 25 2
Turn-Off Delay Time td(off) 85 ns VDD = 250 V, ID = 4.5 A, RG = 25 2
Turn-Off Fall Time tf 45 ns VDD = 250 V, ID = 4.5 A, RG = 25 2
Gate-Source Charge Qgs 3 nC VDS = 400 V, ID = 4.5 A, VGS = 10 V 2
Gate-Drain Charge Qgd 8 nC VDS = 400 V, ID = 4.5 A, VGS = 10 V 2
Reverse Recovery Time trr 270 ns VGS = 0 V, IS = 4.5 A, dIF / dt = 100 A/µs 2
Reverse Recovery Charge Qrr 2 µC VGS = 0 V, IS = 4.5 A, dIF / dt = 100 A/µs 2

CAD (KiCad official)

  • Symbol: CMD5N50
  • Footprint: Package_TO_SOT_SMD:TO-252-2
  • 3D model: TO-252 (KiCad packages3D, STEP)
  • 3D model files: cmd5n50-etched.step / cmd5n50-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cmd5n50.step / cmd5n50.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Cmos datasheet (2 pp, sha256 0df2e1705eef67a1, retrieved 2026-10-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF