component
MC74HC240ADWR2G
Public Made by Adomby adom
onsemi Buffers / Drivers, SOIC-20-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
README
markdownMC74HC240ADWR2G
onsemi · Buffers / Drivers · SOIC-20-300mil
MC74HC240ADWR2G from onsemi, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | ENABLE A | input | Active-low output enable for the YA outputs; low enables them as inverters, high puts them in high impedance. |
| 2 | A1 | input | Data input 1 of group A; appears inverted on YA1 when the outputs are enabled. |
| 3 | YB4 | tri_state | Inverting 3-state output of group B, high impedance when Enable B is high. |
| 4 | A2 | input | Data input 2 of group A; appears inverted on YA2 when the outputs are enabled. |
| 5 | YB3 | tri_state | Inverting 3-state output of group B, high impedance when Enable B is high. |
| 6 | A3 | input | Data input 3 of group A; appears inverted on YA3 when the outputs are enabled. |
| 7 | YB2 | tri_state | Inverting 3-state output of group B, high impedance when Enable B is high. |
| 8 | A4 | input | Data input 4 of group A; appears inverted on YA4 when the outputs are enabled. |
| 9 | YB1 | tri_state | Inverting 3-state output of group B, high impedance when Enable B is high. |
| 10 | GND | power_in | Ground (0 V reference) for the device. |
| 11 | B1 | input | Data input 1 of group B; appears inverted on YB1 when the outputs are enabled. |
| 12 | YA4 | tri_state | Inverting 3-state output of group A, high impedance when Enable A is high. |
| 13 | B2 | input | Data input 2 of group B; appears inverted on YB2 when the outputs are enabled. |
| 14 | YA3 | tri_state | Inverting 3-state output of group A, high impedance when Enable A is high. |
| 15 | B3 | input | Data input 3 of group B; appears inverted on YB3 when the outputs are enabled. |
| 16 | YA2 | tri_state | Inverting 3-state output of group A, high impedance when Enable A is high. |
| 17 | B4 | input | Data input 4 of group B; appears inverted on YB4 when the outputs are enabled. |
| 18 | YA1 | tri_state | Inverting 3-state output of group A, high impedance when Enable A is high. |
| 19 | ENABLE B | input | Active-low output enable for the YB outputs; low enables them as inverters, high puts them in high impedance. |
| 20 | VCC | power_in | Positive supply voltage, recommended operating range 2.0 to 6.0 V (absolute maximum 7.0 V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-20-300mil |
| Category | Logic ICs |
| Pins | 20 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| DC Supply Voltage | VCC | -0.5 | 7 | V | Referenced to GND | 2 | |
| DC Input Current per Pin | Iin | -20 | 20 | mA | 2 | ||
| DC Output Current per Pin | Iout | -35 | 35 | mA | 2 | ||
| DC Supply Current, VCC and GND Pins | ICC | -75 | 75 | mA | 2 | ||
| Power Dissipation in Still Air, SOIC Package | PD | 500 | mW | SOIC package; derate -7 mW/C from 65 to 125C | 2 | ||
| Storage Temperature | Tstg | -65 | 150 | C | 2 | ||
| Lead Temperature | TL | 260 | C | 1 mm from case for 10 seconds (SOIC or TSSOP) | 2 | ||
| DC Supply Voltage | VCC | 2 | 6 | V | Referenced to GND | 2 | |
| DC Input Voltage, Output Voltage | Vin, Vout | 0 | 6 | V | 0 to VCC; max shown at VCC = 6.0 V | 2 | |
| Operating Temperature, All Package Types | TA | -55 | 125 | C | 2 | ||
| Input Rise and Fall Time | tr, tf | 0 | 1000 | ns | VCC = 2.0 V | 2 | |
| Input Rise and Fall Time | tr, tf | 0 | 500 | ns | VCC = 4.5 V | 2 | |
| Input Rise and Fall Time | tr, tf | 0 | 400 | ns | VCC = 6.0 V | 2 | |
| Minimum High-Level Input Voltage | VIH | 1.5 | V | VCC = 2.0 V, Vout = VCC - 0.1 V, /Iout/ ≤ 20 µA; all temperatures | 3 | ||
| Minimum High-Level Input Voltage | VIH | 2.1 | V | VCC = 3.0 V, Vout = VCC - 0.1 V, /Iout/ ≤ 20 µA; all temperatures | 3 | ||
| Minimum High-Level Input Voltage | VIH | 3.15 | V | VCC = 4.5 V, Vout = VCC - 0.1 V, /Iout/ ≤ 20 µA; all temperatures | 3 | ||
| Minimum High-Level Input Voltage | VIH | 4.2 | V | VCC = 6.0 V, Vout = VCC - 0.1 V, /Iout/ ≤ 20 µA; all temperatures | 3 | ||
| Maximum Low-Level Input Voltage | VIL | 0.5 | V | VCC = 2.0 V, Vout = 0.1 V, /Iout/ ≤ 20 µA; all temperatures | 3 | ||
| Maximum Low-Level Input Voltage | VIL | 0.9 | V | VCC = 3.0 V, Vout = 0.1 V, /Iout/ ≤ 20 µA; all temperatures | 3 | ||
| Maximum Low-Level Input Voltage | VIL | 1.35 | V | VCC = 4.5 V, Vout = 0.1 V, /Iout/ ≤ 20 µA; all temperatures | 3 | ||
| Maximum Low-Level Input Voltage | VIL | 1.8 | V | VCC = 6.0 V, Vout = 0.1 V, /Iout/ ≤ 20 µA; all temperatures | 3 | ||
| Minimum High-Level Output Voltage | VOH | 1.9 | V | VCC = 2.0 V, Vin = VIH, /Iout/ ≤ 20 µA; all temperatures | 3 | ||
| Minimum High-Level Output Voltage | VOH | 4.4 | V | VCC = 4.5 V, Vin = VIH, /Iout/ ≤ 20 µA; all temperatures | 3 | ||
| Minimum High-Level Output Voltage | VOH | 5.9 | V | VCC = 6.0 V, Vin = VIH, /Iout/ ≤ 20 µA; all temperatures | 3 | ||
| Minimum High-Level Output Voltage | VOH | 2.48 | V | VCC = 3.0 V, Vin = VIH, /Iout/ ≤ 2.4 mA; -55 to 25C | 3 | ||
| Minimum High-Level Output Voltage | VOH | 2.34 | V | VCC = 3.0 V, Vin = VIH, /Iout/ ≤ 2.4 mA; ≤85C | 3 | ||
| Minimum High-Level Output Voltage | VOH | 2.2 | V | VCC = 3.0 V, Vin = VIH, /Iout/ ≤ 2.4 mA; ≤125C | 3 | ||
| Minimum High-Level Output Voltage | VOH | 3.98 | V | VCC = 4.5 V, Vin = VIH, /Iout/ ≤ 6.0 mA; -55 to 25C | 3 | ||
| Minimum High-Level Output Voltage | VOH | 3.84 | V | VCC = 4.5 V, Vin = VIH, /Iout/ ≤ 6.0 mA; ≤85C | 3 | ||
| Minimum High-Level Output Voltage | VOH | 3.7 | V | VCC = 4.5 V, Vin = VIH, /Iout/ ≤ 6.0 mA; ≤125C | 3 | ||
| Minimum High-Level Output Voltage | VOH | 5.48 | V | VCC = 6.0 V, Vin = VIH, /Iout/ ≤ 7.8 mA; -55 to 25C | 3 | ||
| Minimum High-Level Output Voltage | VOH | 5.34 | V | VCC = 6.0 V, Vin = VIH, /Iout/ ≤ 7.8 mA; ≤85C | 3 | ||
| Minimum High-Level Output Voltage | VOH | 5.2 | V | VCC = 6.0 V, Vin = VIH, /Iout/ ≤ 7.8 mA; ≤125C | 3 | ||
| Maximum Low-Level Output Voltage | VOL | 0.1 | V | VCC = 2.0 V, Vin = VIL, /Iout/ ≤ 20 µA; all temperatures | 3 | ||
| Maximum Low-Level Output Voltage | VOL | 0.26 | V | VCC = 3.0 V, Vin = VIL, /Iout/ ≤ 2.4 mA; -55 to 25C | 3 | ||
| Maximum Low-Level Output Voltage | VOL | 0.33 | V | VCC = 3.0 V, Vin = VIL, /Iout/ ≤ 2.4 mA; ≤85C | 3 | ||
| Maximum Low-Level Output Voltage | VOL | 0.4 | V | VCC = 3.0 V, Vin = VIL, /Iout/ ≤ 2.4 mA; ≤125C | 3 | ||
| Maximum Input Leakage Current | Iin | -0.1 | 0.1 | µA | VCC = 6.0 V, Vin = VCC or GND; -55 to 25C | 3 | |
| Maximum Input Leakage Current | Iin | -1 | 1 | µA | VCC = 6.0 V, Vin = VCC or GND; ≤85C | 3 | |
| Maximum Three-State Leakage Current | IOZ | -0.5 | 0.5 | µA | VCC = 6.0 V, output in high-impedance state, Vin = VIL or VIH, Vout = VCC or GND; -55 to 25C | 3 | |
| Maximum Three-State Leakage Current | IOZ | -5 | 5 | µA | VCC = 6.0 V, output in high-impedance state, Vin = VIL or VIH, Vout = VCC or GND; ≤85C | 3 | |
| Maximum Three-State Leakage Current | IOZ | -10 | 10 | µA | VCC = 6.0 V, output in high-impedance state, Vin = VIL or VIH, Vout = VCC or GND; ≤125C | 3 | |
| Maximum Quiescent Supply Current (per Package) | ICC | 4 | µA | VCC = 6.0 V, Vin = VCC or GND, Iout = 0 µA; -55 to 25C | 3 | ||
| Maximum Quiescent Supply Current (per Package) | ICC | 40 | µA | VCC = 6.0 V, Vin = VCC or GND, Iout = 0 µA; ≤85C | 3 | ||
| Maximum Quiescent Supply Current (per Package) | ICC | 160 | µA | VCC = 6.0 V, Vin = VCC or GND, Iout = 0 µA; ≤125C | 3 | ||
| Maximum Input Capacitance | Cin | 10 | pF | all temperatures | 3 | ||
| Maximum Three-State Output Capacitance | Cout | 15 | pF | Output in high-impedance state; all temperatures | 3 | ||
| Power Dissipation Capacitance (Per Transceiver Channel) | CPD | 32 | pF | Typical @ 25°C, VCC = 5.0 V | 3 |
CAD (KiCad official)
- Symbol:
MC74HC240ADWR2G - Footprint:
Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm - 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
- 3D model files:
mc74hc240adwr2g-etched.step/mc74hc240adwr2g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mc74hc240adwr2g.step/mc74hc240adwr2g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (8 pp, sha256
00c1a4065eb3b90d, retrieved 2026-10-26, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).