Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

3D Model

Open in new tab ↗

Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗

Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗

Loads when you scroll to it. Unloads after 5 minutes in the background.

Datasheet

Open in new tab ↗

Loads when you scroll to it. Unloads after 5 minutes in the background.

Download PDF

Contents

Pinout
Key specifications
CAD (KiCad official)
Provenance

README

markdown

DRV8244PQDGQRQ1

Texas Instruments · Brushed DC Motor Drivers · HTSSOP-28

DRV8244PQDGQRQ1 from Texas Instruments, in a HTSSOP-28. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	SCLK	input	SPI serial clock input.
2	nSCS	input	SPI chip select; an active low on this pin enables the serial interface communication.
3	PH/IN2	input	Controller input pin for bridge operation, per the Bridge Control section; it can be tied low or left floating if register-only control is needed.
4	EN/IN1	input	Controller input pin for bridge operation, per the Bridge Control section; it can be tied low or left floating if register-only control is needed.
5	DRVOFF	input	Controller input pin for bridge Hi-Z; it can be tied low if shutoff through the pin is not needed, in which case the equivalent register bit can be used.
6	VM	power_in	Motor supply voltage; combine with the other five VM pins to support device current capability and bypass to GND with a 0.1-µF ceramic capacitor and a bulk capacitor.
7	VM	power_in	Motor supply voltage; combine with the other five VM pins to support device current capability and bypass to GND with a 0.1-µF ceramic capacitor and a bulk capacitor.
8	VM	power_in	Motor supply voltage; combine with the other five VM pins to support device current capability and bypass to GND with a 0.1-µF ceramic capacitor and a bulk capacitor.
9	OUT1	power_out	Half-bridge output 1; connect to the motor or load and combine with the other two OUT1 pins to support device current capability.
10	OUT1	power_out	Half-bridge output 1; connect to the motor or load and combine with the other two OUT1 pins to support device current capability.
11	OUT1	power_out	Half-bridge output 1; connect to the motor or load and combine with the other two OUT1 pins to support device current capability.
12	GND	power_in	Ground pin; combine with the other five GND pins to support device current capability.
13	GND	power_in	Ground pin; combine with the other five GND pins to support device current capability.
14	GND	power_in	Ground pin; combine with the other five GND pins to support device current capability.
15	GND	power_in	Ground pin; combine with the other five GND pins to support device current capability.
16	GND	power_in	Ground pin; combine with the other five GND pins to support device current capability.
17	GND	power_in	Ground pin; combine with the other five GND pins to support device current capability.
18	OUT2	power_out	Half-bridge output 2; connect to the motor or load and combine with the other two OUT2 pins to support device current capability.
19	OUT2	power_out	Half-bridge output 2; connect to the motor or load and combine with the other two OUT2 pins to support device current capability.
20	OUT2	power_out	Half-bridge output 2; connect to the motor or load and combine with the other two OUT2 pins to support device current capability.
21	VM	power_in	Motor supply voltage; combine with the other five VM pins to support device current capability and bypass to GND with a 0.1-µF ceramic capacitor and a bulk capacitor.
22	VM	power_in	Motor supply voltage; combine with the other five VM pins to support device current capability and bypass to GND with a 0.1-µF ceramic capacitor and a bulk capacitor.
23	VM	power_in	Motor supply voltage; combine with the other five VM pins to support device current capability and bypass to GND with a 0.1-µF ceramic capacitor and a bulk capacitor.
24	VDD	power_in	SPI (P) variant logic power supply to the device; absolute maximum VDD is -0.3 V to 5.75 V with a transient voltage ramp of 5 V/µs.
25	IPROPI	bidirectional	Driver load current analog feedback; it must be connected to an external resistor RIPROPI to ground, and can be tied low if the ITRIP and IPROPI functions are not needed.
26	nFAULT	output	Open-drain fault indication output to the controller; monitoring is optional because all diagnostic information can be read from the STATUS registers.
27	SDO	output	SPI serial data output, updated at the rising edge of SCLK; in the SPI (P) variant SDO tracks the VDD voltage, so a level shifter or current-limiting series resistor is recommended for a 3.3-V controller input.
28	SDI	input	SPI serial data input, captured at the falling edge of SCLK.
29	EP	passive	Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	HTSSOP-28
Category	Motor Driver ICs
Pins	29

CAD (KiCad official)

Symbol: DRV8244PQDGQRQ1
Footprint: Package_SO:TSSOP-28-1EP_4.4x9.7mm_P0.65mm_EP2.85x6.7mm
3D model: HTSSOP-28 (KiCad packages3D, STEP)
3D model files: drv8244pqdgqrq1-etched.step / drv8244pqdgqrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); drv8244pqdgqrq1.step / drv8244pqdgqrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (80 pp, sha256 281a112861744a62, retrieved 2026-10-11, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF