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MP4569GN-Z
Public Made by Adomby adom
MONOLITHIC POWER SYSTEMS INC. Global Sourcing Parts, SOIC-8-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMP4569GN-Z
MONOLITHIC POWER SYSTEMS INC. · Global Sourcing Parts · SOIC-8-EP
MP4569GN-Z from MONOLITHIC POWER SYSTEMS INC., in a SOIC-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground; connect the output capacitor close to this pin to avoid high-current switch paths. |
| 2 | IN | power_in | Input supply (4.5V to 75V recommended) that requires a decoupling capacitor to ground to reduce switching spikes. |
| 3 | EN | input | Enable input: pulling below the low threshold (1.2V falling) shuts the chip down, above the rising threshold (1.55V typ) enables it, and floating shuts it down; the sink current must stay below 150μA. |
| 4 | FB | input | Feedback input connected to the tap of an external resistive divider between the output and GND, setting the regulation voltage against the internal 1V reference. |
| 5 | SS | passive | Soft-start control input; connect a capacitor from SS to GND to set the soft-start period (charged by a 5.5μA typ current source). |
| 6 | BIAS | power_in | Controller bias input that supplies current to the internal circuit when VBIAS>2.9V (and powers the LS_FET driver when VBIAS>4.5V). |
| 7 | BST | passive | Bootstrap pin, the positive supply for the internal floating high-side MOSFET driver; connect a bypass capacitor between this pin and SW. |
| 8 | SW | output | Switch node (rated -0.3V to VIN + 1V). |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | MONOLITHIC POWER SYSTEMS INC. |
| Package | SOIC-8-EP |
| Category | Global Sourcing Parts |
| Pins | 9 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VIN | -0.3 | 80 | V | 3 | ||
| Switch Voltage | VSW | -0.3 | V | -0.3V to VIN + 1V | 3 | ||
| BST to SW | VBST-VSW | -0.3 | 6 | V | 3 | ||
| All Other Pins | -0.3 | 6 | V | 3 | |||
| EN Sink Current | 150 | μA | 3 | ||||
| Continuous Power Dissipation SOIC-8 EP | PD | 2.6 | W | TA = +25°C | 3 | ||
| Junction Temperature | TJ | 150 | °C | 3 | |||
| Lead Temperature | 260 | °C | 3 | ||||
| Storage Temperature | -65 | 150 | °C | 3 | |||
| Supply Voltage | VIN | 4.5 | 75 | V | 3 | ||
| Output Voltage | VOUT | 1 | V | 1V to 0.9xVIN | 3 | ||
| Operating Junction Temperature | TJ | -40 | 125 | °C | 3 | ||
| Thermal Resistance Junction-Ambient SOIC-8 EP | θJA | 48 | °C/W | JESD51-7, 4-layer PCB | 3 | ||
| Thermal Resistance Junction-Case SOIC-8 EP | θJC | 12 | °C/W | JESD51-7, 4-layer PCB | 3 | ||
| Supply Quiescent Current | 20 | 25 | μA | No load, VFB=1.2V | 4 | ||
| Shutdown Supply Current | 2.2 | 3.5 | μA | VEN < 0.3V | 4 | ||
| VIN UVLO Rising Threshold | 3.9 | 4.2 | 4.4 | V | 4 | ||
| VIN UVLO Falling Threshold | 3.45 | 3.75 | 3.95 | V | 4 | ||
| VIN UVLO Hysteresis | 0.45 | V | 4 | ||||
| Feedback Voltage | VFB | 0.98 | 1 | 1.02 | V | VIN=4V to 75V, -40°C<TJ<125°C | 4 |
| Feedback Voltage | VFB | 0.99 | 1 | 1.01 | V | VIN=4V to 75V, TJ =25 °C | 4 |
| Feedback Current | -50 | 2 | 50 | nA | VFB=1.2V | 4 | |
| Upper Switch On Resistance | 0.9 | 1.2 | 1.5 | Ω | VBST-VSW=5V | 4 | |
| Lower Switch On Resistance | 0.275 | 0.45 | 0.625 | Ω | VBIAS=5V | 4 | |
| Lower Switch Leakage | 1 | μA | VEN = 0V, VSW = 75V | 4 | |||
| Peak Current Limit | 670 | 730 | 790 | mA | 4 | ||
| Minimum Switch On Time | 120 | ns | 4 | ||||
| Enable Rising Threshold | 1.4 | 1.55 | 1.7 | V | 4 | ||
| Enable Falling Threshold | 1.152 | 1.2 | 1.248 | V | 4 | ||
| Enable Threshold Hysteresis | 0.35 | V | 4 | ||||
| Enable Current | 0.8 | μA | VEN=2.4V | 4 | |||
| Soft Start Current | 4 | 5.5 | 7 | μA | 4 | ||
| FB OVP Rising Threshold | 1.05 | 1.1 | V | 4 | |||
| FB OVP Hysteresis | 50 | mV | 4 | ||||
| Thermal Shutdown | 175 | °C | 4 | ||||
| Thermal Shutdown Hysteresis | 20 | °C | 4 |
CAD (KiCad official)
- Symbol:
MP4569GN-Z - Footprint:
Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm - 3D model: SOIC-8-EP (KiCad packages3D, STEP)
- 3D model files:
mp4569gn-z-etched.step/mp4569gn-z-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mp4569gn-z.step/mp4569gn-z.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: MONOLITHIC POWER SYSTEMS INC. datasheet (17 pp, sha256
06051e4d2bb421cd, retrieved 2026-10-23, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).