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DMP6050SSD-13

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Diodes Incorporated MOSFETs, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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3D Model

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Symbol & Footprint

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Datasheet

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Contents

README

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DMP6050SSD-13

Diodes Incorporated · MOSFETs · SO-8

DMP6050SSD-13 from Diodes Incorporated, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S1 passive Source of P-channel MOSFET 1.
2 G1 input Gate of P-channel MOSFET 1, with VGSS rated ±20V.
3 S2 passive Source of P-channel MOSFET 2.
4 G2 input Gate of P-channel MOSFET 2, with VGSS rated ±20V.
5 D2 passive Drain of P-channel MOSFET 2, with VDSS rated -60V.
6 D2 passive Drain of P-channel MOSFET 2, with VDSS rated -60V (tied with pin 5).
7 D1 passive Drain of P-channel MOSFET 1, with VDSS rated -60V.
8 D1 passive Drain of P-channel MOSFET 1, with VDSS rated -60V (tied with pin 7).

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package SO-8
Category Transistors
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDSS -60 V TA = +25°C 2
Gate-Source Voltage VGSS -20 20 V ±20V 2
Continuous Drain Current ID -11.3 A VGS = -10V, TC = +25°C (Note 6) 2
Continuous Drain Current ID -9.1 A VGS = -10V, TC = +70°C (Note 6) 2
Continuous Drain Current ID -4.8 A VGS = -10V, TA = +25°C (Note 6) 2
Continuous Drain Current ID -3.9 A VGS = -10V, TA = +70°C (Note 6) 2
Pulsed Drain Current IDM -32 A 10μs pulse, duty cycle = 1% 2
Maximum Continuous Body Diode Forward Current IS -2.8 A Note 6 2
Avalanche Current IAS -24.8 A L = 0.1mH (Note 7) 2
Avalanche Energy EAS 30.8 mJ L = 0.1mH (Note 7) 2
Operating and Storage Temperature Range TJ, TSTG -55 150 °C 2
Total Power Dissipation PD 1.2 W TA = +25°C (Note 5) 2
Total Power Dissipation PD 0.9 W TA = +70°C (Note 5) 2
Thermal Resistance, Junction to Ambient RθJA 104 °C/W Steady state (Note 5) 2
Thermal Resistance, Junction to Ambient RθJA 45 °C/W t<10s (Note 5) 2
Total Power Dissipation PD 1.7 W TA = +25°C (Note 6) 2
Total Power Dissipation PD 1.1 W TA = +70°C (Note 6) 2
Thermal Resistance, Junction to Ambient RθJA 72 °C/W Steady state (Note 6) 2
Thermal Resistance, Junction to Ambient RθJA 37 °C/W t<10s (Note 6) 2
Thermal Resistance, Junction to Case RθJC 13 °C/W Note 6 2
Drain-Source Breakdown Voltage BVDSS -60 V VGS = 0V, ID = -250μA 2
Zero Gate Voltage Drain Current IDSS -1 µA VDS = -60V, VGS = 0V, TJ = +25°C 2
Gate-Source Leakage IGSS -100 100 nA VGS = ±20V, VDS = 0V 2
Gate Threshold Voltage VGS(th) -1 -3 V VDS = VGS, ID = -250μA 2
Static Drain-Source On-Resistance RDS(ON) 36 55 mΩ VGS = -10V, ID = -5A 2
Static Drain-Source On-Resistance RDS(ON) 47 70 mΩ VGS = -4.5V, ID = -4A 2
Diode Forward Voltage VSD -0.7 -1.2 V VGS = 0V, IS = -1A 2
Input Capacitance Ciss 1293 pF VDS = -30V, VGS = 0V, f = 1.0MHz 2
Output Capacitance Coss 86.3 pF VDS = -30V, VGS = 0V, f = 1.0MHz 2
Reverse Transfer Capacitance Crss 64.7 pF VDS = -30V, VGS = 0V, f = 1.0MHz 2
Gate Resistance Rg 12 Ω VDS = 0V, VGS = 0V, f = 1MHz 2
Total Gate Charge (VGS = -4.5V) Qg 11.9 nC VDS = -30V, ID = -5A 2
Total Gate Charge (VGS = -10V) Qg 24 nC VDS = -30V, ID = -5A 2
Gate-Source Charge Qgs 3.6 nC VDS = -30V, ID = -5A 2
Gate-Drain Charge Qgd 5.7 nC VDS = -30V, ID = -5A 2
Turn-On Delay Time tD(on) 4.3 ns VGS = -10V, VDS = -30V, RG = 3Ω, ID = -5A 2
Turn-On Rise Time tr 6.3 ns VGS = -10V, VDS = -30V, RG = 3Ω, ID = -5A 2
Turn-Off Delay Time tD(off) 46.7 ns VGS = -10V, VDS = -30V, RG = 3Ω, ID = -5A 2
Turn-Off Fall Time tf 25.3 ns VGS = -10V, VDS = -30V, RG = 3Ω, ID = -5A 2
Body Diode Reverse Recovery Time trr 13.6 ns IF = -5A, di/dt = 100A/μs 2
Body Diode Reverse Recovery Charge Qrr 7.4 nC IF = -5A, di/dt = 100A/μs 2

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing PC Body Diode Reverse Recovery Charge Qrr, 7.4, nC IF = -5A, di/dt = 100A/μs Notes: 5. Device mounted on FR-4 PC board, with minimum recommended pad layout, single sided. 2
contacts Copper tin  Terminal Connections: See Diagram  Terminals: Finish, Matte Tin Annealed over Copper Leadframe 1

CAD (KiCad official)

  • Symbol: DMP6050SSD-13
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: dmp6050ssd-13-etched.step / dmp6050ssd-13-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dmp6050ssd-13.step / dmp6050ssd-13.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (6 pp, sha256 2aab71c9a81f1c7c, retrieved 2026-10-23, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF