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Contents

README

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BR25A256FJ-3MGE2

ROHM Semicon · EEPROM · SOIC-8

BR25A256FJ-3MGE2 from ROHM Semicon, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CSB input Chip select input.
2 SO output Serial data output, output in sync with the falling edge of SCK.
3 WPB input Write protect input; Write status register command is prohibited.
4 GND power_in All input/output reference voltage, 0V.
5 SI input Op code, address, and serial data input, taken in on the rising edge of SCK.
6 SCK input Serial clock input.
7 HOLDB input Hold input; command communications may be suspended temporarily (HOLD status).
8 Vcc power_in Power source to be connected, 2.5V to 5.5V operation.

Key specifications

Parameter Value
Manufacturer ROHM Semicon
Package SOIC-8
Category Memory
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage VCC -0.3 6.5 V 2
Power Dissipation (SOP-J8) Pd 0.45 W Ta=25°C or higher: 4.5mW reduced per 1°C 2
Storage Temperature Tstg -65 150 °C 2
Operating Temperature Topr -40 105 °C 2
Input/Output Voltage -0.3 V -0.3 to Vcc+1.0; not over 6.5V; -1.0V min for pulse width 50ns or less 2
Junction temperature Tjmax 150 °C Junction temperature at the storage condition 2
Electrostatic discharge voltage (HBM) VESD -4000 4000 V human body model 2
Power Source Voltage Vcc 2.5 5.5 V 2
Input Voltage VIN 0 V 0 to VCC 2
Bypass capacitor C 0.1 µF 2
Input Capacity CIN 8 pF VIN=GND, Ta=25°C, frequency=5MHz 2
Output Capacity COUT 8 pF VOUT=GND, Ta=25°C, frequency=5MHz 2
Input Low Voltage VIL -0.3 V max printed as 0.3xVcc; -1.0V min for pulse width 50ns or less 2
Output Low Voltage VOL 0 0.4 V IOL=3.0mA 2
Input Leakage Current ILI -1 1 µA VIN=0 to Vcc 2
Output Leakage Current ILO -1 1 µA VOUT=0 to Vcc, CSB=Vcc 2
Supply Current (Write) ICC1 3 mA Vcc=5.5V, fSCK=10MHz, tE/W=5ms, Byte Write, Page Write, Write Status register 2
Supply Current (Read) ICC2 4 mA Vcc=5.5V, fSCK=10MHz, SO=OPEN, Read, Read Status Register 2
Standby Current ISB 10 µA Vcc=5.5V, SO=OPEN, CSB=HOLDB=WPB=Vcc, SCK=SI=Vcc or GND 2
Write Cycles 1e+06 Times Ta≤25°C 2
Write Cycles 150000 Times Ta≤105°C 2
Data Retention 100 Years Ta≤25°C 2
Data Retention 20 Years Ta≤105°C 2
SCK Frequency fSCK 0.01 5 MHz 2.5≤Vcc≤5.5V 3
SCK Frequency fSCK 0.01 10 MHz 4.0V≤Vcc≤5.5V 3
SCK High Time tSCKWH 80 ns 2.5≤Vcc≤5.5V 3
SCK High Time tSCKWH 40 ns 4.0V≤Vcc≤5.5V 3
SCK Low Time tSCKWL 80 ns 2.5≤Vcc≤5.5V 3
SCK Low Time tSCKWL 40 ns 4.0V≤Vcc≤5.5V 3
CSB High Time tCS 40 ns 2.5≤Vcc≤5.5V and 4.0V≤Vcc≤5.5V 3
CSB Setup Time tCSS 30 ns 2.5≤Vcc≤5.5V and 4.0V≤Vcc≤5.5V 3
CSB Hold Time tCSH 30 ns 2.5≤Vcc≤5.5V and 4.0V≤Vcc≤5.5V 3
SCK Setup Time tSCKS 20 ns 2.5≤Vcc≤5.5V and 4.0V≤Vcc≤5.5V 3
SCK Hold Time tSCKH 20 ns 2.5≤Vcc≤5.5V and 4.0V≤Vcc≤5.5V 3
SI Setup Time tDIS 10 ns 2.5≤Vcc≤5.5V and 4.0V≤Vcc≤5.5V 3
SI Hold Time tDIH 10 ns 2.5≤Vcc≤5.5V and 4.0V≤Vcc≤5.5V 3
Data Output Delay Time tPD 70 ns 2.5≤Vcc≤5.5V 3
Data Output Delay Time tPD 40 ns 4.0V≤Vcc≤5.5V 3
Output Hold Time tOH 0 ns 2.5≤Vcc≤5.5V and 4.0V≤Vcc≤5.5V 3
Output Disable Time tOZ 40 ns 2.5≤Vcc≤5.5V and 4.0V≤Vcc≤5.5V 3
HOLDB Setting Setup Time tHFS 0 ns 2.5≤Vcc≤5.5V and 4.0V≤Vcc≤5.5V 3
HOLDB Setting Hold Time tHFH 20 ns 2.5≤Vcc≤5.5V 3
HOLDB Setting Hold Time tHFH 10 ns 4.0V≤Vcc≤5.5V 3
HOLDB Release Setup Time tHRS 0 ns 2.5≤Vcc≤5.5V and 4.0V≤Vcc≤5.5V 3
HOLDB Release Hold Time tHRH 20 ns 2.5≤Vcc≤5.5V 3
HOLDB Release Hold Time tHRH 10 ns 4.0V≤Vcc≤5.5V 3
Time from HOLDB to Output High-Z tHOZ 40 ns 2.5≤Vcc≤5.5V and 4.0V≤Vcc≤5.5V 3
Time from HOLDB to Output change tHPD 40 ns 2.5≤Vcc≤5.5V and 4.0V≤Vcc≤5.5V 3
SCK Rise Time tRC 2 µs Not 100% tested 3
SCK Fall Time tFC 2 µs Not 100% tested 3
OUTPUT Rise Time tRO 40 ns Not 100% tested 3
OUTPUT Fall Time tFO 40 ns Not 100% tested 3
Write Time tE/W 5 ms 2.5≤Vcc≤5.5V and 4.0V≤Vcc≤5.5V 3
Load Capacitance CL 30 pF 2.5V≤Vcc<4.0V 3
Load Capacitance CL 50 pF 4.0V≤Vcc≤5.5V 3

CAD (KiCad official)

  • Symbol: BR25A256FJ-3MGE2
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: br25a256fj-3mge2-etched.step / br25a256fj-3mge2-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); br25a256fj-3mge2.step / br25a256fj-3mge2.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: ROHM Semicon datasheet (31 pp, sha256 88fc1af8fa1b5b3a, retrieved 2026-11-02, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF