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VPC28C45
Public Unreviewedby Ray
VPSC DC-DC Converters, SOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownVPC28C45
VPSC · DC-DC Converters · SOP-8
VPC28C45 from VPSC, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | COMP | output | Error amplifier compensation output. External compensation network (typ. RC to FB) is connected here to shape the loop response and set zero/pole placement. Internal current limit means the user can override COMP by pulling it to GND to force zero duty cycle. |
| 2 | FB | input | Inverting input of the internal error amplifier. Regulated to VFB = 2.5V (typ). Used for closing the voltage-mode feedback loop from the power converter's output. |
| 3 | CS | input | Current-sense input. Connect to the primary-side current-sense resistor; PWM terminates OUT when VCS reaches the current-limit threshold (VCS_th ≈ 1V max). Can also be used for voltage-mode configuration by injecting a ramp. |
| 4 | RT/CT | passive | Oscillator frequency programming pin. Connect timing resistor RT from VREF to this pin and timing capacitor CT from this pin to GND to set the switching frequency: fOSC ≈ 1.6/(RT·CT). Use RT ≥ 5kΩ. Route CT ground return directly to GND with a short trace. |
| 5 | GND | power_in | Analog ground. Serves as both signal and power ground return for this package (no separate PGND pin). |
| 6 | OUT | output | Gate-driver output for the external N-channel MOSFET. Totem-pole PMOS/NMOS stage sources and sinks up to 1A peak. OUT is held low when VDD is below the UVLO turn-on threshold. Rise ≈ 30ns, fall ≈ 20ns into 1nF. |
| 7 | VDD | power_in | Bias supply input. Absolute max 30V; internal clamp starts conducting around 19V and reaches 24.7V/14mA. UVLO turn-on 14.6V (typ) and turn-off 8.7V (typ) for VPC28C44. Bypass with ≥0.1µF close to the pin plus a larger bulk capacitor (≥10× the driven MOSFET gate capacitance). |
| 8 | VREF | power_out | 5V (±1%) internal reference output. Sources up to 20mA and supplies the RT charging current for the oscillator. Requires a ≥0.1µF ceramic bypass capacitor to GND placed as close to the pin as possible for stability. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | VPSC |
| Package | SOP-8 |
| Category | PMIC |
| Pins | 8 |
Ordering variants
Same part, different packaging or reel option.
VPC28C44VPC28C45VPC38C44
CAD (KiCad official)
- Symbol:
VPC28C45 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: VPSC datasheet (15 pp, sha256
41de8f28b106ea3c, retrieved 2026-08-17, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).