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SN74LV165ADR
Public Made by Adomby adom
Texas Instruments Shift Registers, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN74LV165ADR
Texas Instruments · Shift Registers · SOIC-16
SN74LV165ADR from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SH/LD | input | Shift/Load input; selects parallel load mode when low, shift mode when high |
| 2 | CLK | input | Storage clock input; shifts data on low-to-high transition when SH/LD is high and CLK INH is low |
| 3 | E | input | Parallel data input E; loaded into shift register when SH/LD is low |
| 4 | F | input | Parallel data input F; loaded into shift register when SH/LD is low |
| 5 | G | input | Parallel data input G; loaded into shift register when SH/LD is low |
| 6 | H | input | Parallel data input H; loaded into shift register when SH/LD is low |
| 7 | QH | output | Inverted serial output from shift register stage H |
| 8 | GND | power_in | Ground; 0 V reference potential |
| 9 | QH | output | Serial output from shift register stage H |
| 10 | SER | input | Serial data input; shifted into first register stage on CLK rising edge when SH/LD is high |
| 11 | A | input | Parallel data input A; loaded into shift register when SH/LD is low |
| 12 | B | input | Parallel data input B; loaded into shift register when SH/LD is low |
| 13 | C | input | Parallel data input C; loaded into shift register when SH/LD is low |
| 14 | D | input | Parallel data input D; loaded into shift register when SH/LD is low |
| 15 | CLK INH | input | Clock inhibit input; inhibits clock when low, serves as alternative clock input when pulsed high |
| 16 | VCC | power_in | Positive supply voltage; operates from 2 V to 5.5 V |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-16 |
| Category | Logic |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
SN74LV165ADR - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files:
sn74lv165adr-etched.step/sn74lv165adr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74lv165adr.step/sn74lv165adr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (39 pp, sha256
9713235082974c29, retrieved 2026-09-27, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).