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Contents

README

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IR2109PBF

Infineon Technologies · Gate Drive ICs · PDIP-8

IR2109PBF from Infineon Technologies, in a PDIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCC power_in Low side and logic fixed supply, specified at 10 to 20V recommended operating range with absolute maximum of -0.3 to 25V referenced to COM.
2 IN input Logic input for high and low side gate driver outputs (HO and LO), in phase with HO and referenced to COM for IR2109, with logic input voltage limited to VSS to VCC.
3 SD input Logic input for shutdown referenced to COM for IR2109, where a high level turns off both channels.
4 COM power_in Low side return and reference for all voltage parameters in the absolute maximum ratings.
5 LO output Low side gate drive output, with output voltage limited to VCC plus 0.3V maximum and sourcing/sinking peak currents of 120 mA / 250 mA typical per the product summary.
6 VS power_in High side floating supply return, with offset voltage rated up to 600V and dV/dt transient allowance of 50 V/ns.
7 HO output High side gate drive output, operating up to 600V with output voltage between VS - 0.3 and VB + 0.3.
8 VB power_in High side floating supply, with absolute voltage limited to -0.3 to 625V referenced to COM and operating at VS + 10 to VS + 20V.

Key specifications

Parameter Value
Manufacturer Infineon Technologies
Package PDIP-8
Category Power Management ICs
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
High side floating absolute voltage VB -0.3 625 V 2
Low side and logic fixed supply voltage VCC -0.3 25 V 2
Allowable offset supply voltage transient dVS/dt 50 V/ns 2
Package power dissipation PD 1 W TA ≤ +25C (8 Lead PDIP) 2
Thermal resistance, junction to ambient RthJA 125 C/W 8 Lead PDIP 2
Junction temperature TJ 150 C 2
Storage temperature TS -50 150 C 2
Lead temperature (soldering, 10 seconds) TL 300 C 10 seconds 2
Low side and logic fixed supply voltage VCC 10 20 V 3
High side floating supply offset voltage VS 600 V Note 1 3
Ambient temperature TA -40 125 C 3
Turn-on propagation delay ton 750 950 ns VS = 0V 3
Turn-off propagation delay toff 200 280 ns VS = 0V or 600V 3
Shut-down propagation delay tsd 200 280 ns 3
Delay matching, HS & LS turn-on/off MT 0 70 ns 3
Turn-on rise time tr 150 220 ns VS = 0V 3
Turn-off fall time tf 50 80 ns VS = 0V 3
Deadtime: LO turn-off to HO turn-on (DTLO-HO) DT 400 540 680 ns RDT = 0 3
Deadtime matching = DTLO-HO - DTHO-LO MDT 0 60 ns RDT=0 3
Logic 1 input voltage for HO & logic 0 for LO VIH 2.9 V VCC = 10V to 20V 4
Logic 0 input voltage for HO & logic 1 for LO VIL 0.8 V VCC = 10V to 20V 4
SD input positive going threshold VSD,TH+ 2.9 V VCC = 10V to 20V 4
SD input negative going threshold VSD,TH- 0.8 V VCC = 10V to 20V 4
High level output voltage, VBIAS - VO VOH 0.8 1.4 V IO = 20 mA 4
Low level output voltage, VO VOL 0.3 0.6 V IO = 20 mA 4
Offset supply leakage current ILK 50 uA VB = VS = 600V 4
Quiescent VBS supply current IQBS 20 75 130 uA VIN = 0V or 5V 4
Quiescent VCC supply current IQCC 0.4 1 1.6 mA VIN = 0V or 5V, RDT = 0 4
Logic 1 input bias current IIN+ 5 20 uA IN = 5V, SD = 0V 4
Logic 0 input bias current IIN- 2 uA IN = 0V, SD = 5V 4
VCC and VBS supply undervoltage positive going threshold VCCUV+ 8 8.9 9.8 V 4
VCC and VBS supply undervoltage negative going threshold VCCUV- 7.4 8.2 9 V 4
Hysteresis (VCC) VCCUVH 0.3 0.7 V 4
Hysteresis (VBS) VBSUVH 0.3 0.7 V 4
Output high short circuit pulsed current IO+ 120 200 mA VO = 0V, PW ≤ 10 s 4
Output low short circuit pulsed current IO- 250 350 mA VO = 15V, PW ≤ 10 s 4

CAD (KiCad official)

  • Symbol: IR2109PBF
  • Footprint: Package_DIP:DIP-8_W7.62mm
  • 3D model: PDIP-8 (KiCad packages3D, STEP)
  • 3D model files: ir2109pbf-etched.step / ir2109pbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ir2109pbf.step / ir2109pbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Infineon Technologies datasheet (25 pp, sha256 bb4d0c5c2958a35c, retrieved 2026-10-28, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF