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Contents

README

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TLC59212IPWR

Texas Instruments · Flip Flops · TSSOP-20

TLC59212IPWR from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CLR input Direct clear of the outputs; when CLR is at low level, the D input has no effect at the output. Input thresholds are 3.5 V (positive-going) and 1.5 V (negative-going) with 0.5 to 2 V hysteresis, and the absolute maximum input voltage is 7 V.
2 D1 input Input control to the current sink driver for channel Y1; absolute maximum input voltage is 7 V and recommended VIH is 0.7 × VCC minimum, VIL is 0.3 × VCC maximum.
3 D2 input Input control to the current sink driver for channel Y2; absolute maximum input voltage is 7 V and recommended VIH is 0.7 × VCC minimum, VIL is 0.3 × VCC maximum.
4 D3 input Input control to the current sink driver for channel Y3; absolute maximum input voltage is 7 V and recommended VIH is 0.7 × VCC minimum, VIL is 0.3 × VCC maximum.
5 D4 input Input control to the current sink driver for channel Y4; absolute maximum input voltage is 7 V and recommended VIH is 0.7 × VCC minimum, VIL is 0.3 × VCC maximum.
6 D5 input Input control to the current sink driver for channel Y5; absolute maximum input voltage is 7 V and recommended VIH is 0.7 × VCC minimum, VIL is 0.3 × VCC maximum.
7 D6 input Input control to the current sink driver for channel Y6; absolute maximum input voltage is 7 V and recommended VIH is 0.7 × VCC minimum, VIL is 0.3 × VCC maximum.
8 D7 input Input control to the current sink driver for channel Y7; absolute maximum input voltage is 7 V and recommended VIH is 0.7 × VCC minimum, VIL is 0.3 × VCC maximum.
9 D8 input Input control to the current sink driver for channel Y8; absolute maximum input voltage is 7 V and recommended VIH is 0.7 × VCC minimum, VIL is 0.3 × VCC maximum.
10 CLK input Clock to the positive-edge-triggered D flip-flops; data at D is transferred to Y on the positive-going clock edge, and D has no effect while CLK is high or low.
11 GND power_in Ground reference for the device.
12 Y8 output Open-collector current sink output to load; recommended output voltage up to 24 V and output current up to 40 mA per bit (output low).
13 Y7 output Open-collector current sink output to load; recommended output voltage up to 24 V and output current up to 40 mA per bit (output low).
14 Y6 output Open-collector current sink output to load; recommended output voltage up to 24 V and output current up to 40 mA per bit (output low).
15 Y5 output Open-collector current sink output to load; recommended output voltage up to 24 V and output current up to 40 mA per bit (output low).
16 Y4 output Open-collector current sink output to load; recommended output voltage up to 24 V and output current up to 40 mA per bit (output low).
17 Y3 output Open-collector current sink output to load; recommended output voltage up to 24 V and output current up to 40 mA per bit (output low).
18 Y2 output Open-collector current sink output to load; recommended output voltage up to 24 V and output current up to 40 mA per bit (output low).
19 Y1 output Open-collector current sink output to load; recommended output voltage up to 24 V and output current up to 40 mA per bit (output low).
20 VCC power_in Supply voltage, 4.5 V to 5.5 V recommended; absolute maximum supply voltage is 7 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-20
Category Logic
Pins 20

CAD (KiCad official)

  • Symbol: TLC59212IPWR
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)
  • 3D model files: tlc59212ipwr-etched.step / tlc59212ipwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlc59212ipwr.step / tlc59212ipwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (19 pp, sha256 90206e8978dd1b36, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF