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MCP4631T-103E
Public Made by Adomby adom
Microchip Tech Digital Potentiometers, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMCP4631T-103E
Microchip Tech · Digital Potentiometers · TSSOP-14
MCP4631T-103E from Microchip Tech, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | HVC/A0 | input | Address 0 input for the I2C interface, latched at POR/BOR, that also serves as the High Voltage command pin (HVC/A0 = VIHH selects a High Voltage command instead of a normal command). |
| 2 | SCL | input | I2C serial clock input; the device is a slave and its SCL pin accepts only external clock signals from the host controller. |
| 3 | SDA | bidirectional | I2C serial data pin, an open-drain N-channel driver connected to the host controller SDA line. |
| 4 | VSS | power_in | Device ground reference; the input supply is referenced to this pin. |
| 5 | P1B | passive | Potentiometer 1 terminal B, the fixed connection to the zero-scale wiper value (0x00); the voltage on this terminal must be between VSS and VDD and it can carry positive or negative current. |
| 6 | P1W | passive | Potentiometer 1 wiper terminal, the adjustable terminal of the digital potentiometer; the voltage must be between VSS and VDD and it can carry positive or negative current. |
| 7 | P1A | passive | Potentiometer 1 terminal A, the fixed connection to the full-scale wiper value (0x80 for 7-bit devices); the voltage on this terminal must be between VSS and VDD. |
| 8 | P0A | passive | Potentiometer 0 terminal A, the fixed connection to the full-scale wiper value (0x80 for 7-bit devices); the voltage on this terminal must be between VSS and VDD. |
| 9 | P0W | passive | Potentiometer 0 wiper terminal, the adjustable terminal of the digital potentiometer; the voltage must be between VSS and VDD and it can carry positive or negative current. |
| 10 | P0B | passive | Potentiometer 0 terminal B, the fixed connection to the zero-scale wiper value (0x00); the voltage on this terminal must be between VSS and VDD and it can carry positive or negative current. |
| 11 | NC | unconnected | No connection; the datasheet states this pin should be connected to either VDD or VSS. |
| 12 | A2 | input | I2C interface Address 2 pin; together with A1 and A0 it allows up to eight devices on a single I2C bus. |
| 13 | A1 | input | I2C interface Address 1 pin; together with A2 and A0 it allows up to eight devices on a single I2C bus. |
| 14 | VDD | power_in | Positive power supply input referenced to VSS; the electrical performance may not meet the data sheet specifications while VDD is below Vmin (2.7V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | TSSOP-14 |
| Category | ADC/DAC/Data Conversion |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage (device characteristics specified) | VDD | 2.7 | 5.5 | V | 4 | ||
| Supply voltage (serial interface only) | VDD | 1.8 | 2.7 | V | Serial Interface only. | 4 | |
| Voltage on VDD with respect to VSS | VDD | -0.6 | 7 | V | 3 | ||
| Voltage on HVC/A0, A1, A2, SCL, SDA with respect to VSS | -0.6 | 12.5 | V | 3 | |||
| Voltage on all other pins (PxA, PxW, PxB) with respect to VSS | -0.3 | V | Maximum printed as VDD + 0.3V | 3 | |||
| Input clamp current | IIK | -20 | 20 | mA | VI < 0, VI > VDD, VI > VPP ON HV pins | 3 | |
| Output clamp current | IOK | -20 | 20 | mA | VO < 0 or VO > VDD | 3 | |
| Maximum output current sunk by any output pin | 25 | mA | 3 | ||||
| Maximum output current sourced by any output pin | 25 | mA | 3 | ||||
| Maximum current out of VSS pin | 100 | mA | 3 | ||||
| Maximum current into VDD pin | 100 | mA | 3 | ||||
| Maximum current into PXA, PXW, PXB pins | -2.5 | 2.5 | mA | 3 | |||
| Storage temperature | TA | -65 | 150 | °C | 16 | ||
| Ambient temperature with power applied | TA | -40 | 125 | °C | 3 | ||
| Package power dissipation, TSSOP-14 | 1 | W | TA = +50°C, TJ = +150°C | 3 | |||
| Soldering temperature of leads | 300 | °C | 10 seconds | 3 | |||
| ESD protection on all pins (HBM) | 4 | kV | HBM | 3 | |||
| ESD protection on all pins (MM) | 300 | V | MM | 3 | |||
| Maximum junction temperature | TJ | 150 | °C | 3 | |||
| Specified temperature range | TA | -40 | 125 | °C | 16 | ||
| Operating temperature range | TA | -40 | 125 | °C | 16 | ||
| HVC pin voltage range | VHV | 12.5 | V | VDD ≥ 4.5V | 4 | ||
| VDD start voltage to ensure wiper reset (BOR) | VBOR | 1.65 | V | RAM retention voltage (VRAM) < VBOR | 4 | ||
| Delay after device exits the reset state | TBORD | 10 | 20 | µs | Delay after device exits the reset state (VDD > VBOR) | 4 | |
| Supply current, serial interface active, FSCL 3.4 MHz | IDD | 600 | µA | Serial interface active, HVC/A0 = VIH (or VIL), write all 0s to volatile wiper 0, VDD = 5.5V, FSCL = 3.4 MHz | 4 | ||
| Supply current, serial interface active, FSCL 100 kHz | IDD | 250 | µA | Serial interface active, HVC/A0 = VIH (or VIL), write all 0s to volatile wiper 0, VDD = 5.5V, FSCL = 100 kHz | 4 | ||
| Supply current, serial interface inactive | IDD | 2.5 | 5 | µA | Serial interface inactive (stop condition, SCL = SDA = VIH), wiper = 0, VDD = 5.5V, HVC/A0 = VIH | 4 | |
| Nominal resistance RAB (-103 device) | RAB | 8 | 10 | 12 | kΩ | -103 devices (Note 1) | 5 |
| Resistance tolerance (RAB) | RAB | -20 | 20 | % | Printed as ±20%; -103 devices | 5 | |
| Nominal resistance match, MCP46X1 devices | /RAB0-RAB1//RAB | 0.2 | 1.25 | % | MCP46X1 devices only | 5 | |
| Wiper resistance at VDD = 5.5 V | RW | 75 | 160 | Ω | VDD = 5.5 V, IW = 2.0 mA, code = 00h | 5 | |
| Wiper resistance at VDD = 2.7 V | RW | 75 | 300 | Ω | VDD = 2.7 V, IW = 2.0 mA, code = 00h | 5 | |
| Full-scale error (7-bit, 10 k, MCP4XX1 only) | VWFSE | -2 | -0.1 | LSb | 10 k 7-bit, 3.0V ≤ VDD ≤ 5.5V | 7 | |
| Zero-scale error (7-bit, 10 k, MCP4XX1 only) | VWZSE | 0.1 | 2 | LSb | 10 k 7-bit, 3.0V ≤ VDD ≤ 5.5V | 7 | |
| Potentiometer integral non-linearity (7-bit, MCP4XX1 only) | INL | -0.5 | 0.5 | LSb | 7-bit, MCP4XX1 devices only (Note 2) | 7 | |
| Potentiometer differential non-linearity (7-bit, MCP4XX1 only) | DNL | -0.25 | 0.25 | LSb | 7-bit, MCP4XX1 devices only (Note 2) | 7 | |
| Maximum current through terminal A or W (W = FS) | IT | 2.5 | mA | Terminal A IAW, W = Full-Scale (FS) | 6 | ||
| Maximum current through terminal B (W = ZS) | IT | 2.5 | mA | Terminal B IBW, W = Zero Scale (ZS) | 6 | ||
| Maximum current through terminal W | IT | 2.5 | mA | Terminal W IAW or IBW, W = FS or ZS | 6 | ||
| Maximum current terminal A to B (RAB(MIN) = 8000) | IAB | 0.688 | mA | IAB, VB = 0V, VA = 5.5V, RAB(MIN) = 8000 | 6 | ||
| High voltage limit (digital inputs) | VMAX | 12.5 | V | Pin can tolerate VMAX or less. | 11 | ||
| Output low voltage (SDA), VDD ≥ 2.0 V | VOL | 0.4 | V | VDD ≥ 2.0V, IOL = 3 mA | 12 | ||
| Weak pull-up / pull-down current | IPU | 1.75 | mA | Internal VDD pull-up, VIHH pull-down, VDD = 5.5V, VIHH = 12.5V | 12 | ||
| Input leakage current | IIL | -1 | 1 | µA | VIN = VDD and VIN = VSS | 12 | |
| I2C clock frequency, standard mode | FSCL | 0 | 100 | kHz | Cb = 400 pF, 1.8V - 5.5V | 13 | |
| I2C clock frequency, fast mode | FSCL | 0 | 400 | kHz | Cb = 400 pF, 2.7V - 5.5V | 13 | |
| I2C clock frequency, high-speed 1.7 | FSCL | 0 | 1.7 | MHz | Cb = 400 pF, 4.5V - 5.5V | 13 | |
| I2C clock frequency, high-speed 3.4 | FSCL | 0 | 3.4 | MHz | Cb = 100 pF, 4.5V - 5.5V | 13 | |
| I2C output valid from clock, 100 kHz mode | TAA | 3450 | ns | Note 1 | 15 | ||
| I2C output valid from clock, 400 kHz mode | TAA | 900 | ns | Note 1 | 15 | ||
| Nominal resistance tempco | RAB/T | 50 | ppm/°C | TA = -20°C to +70°C | 5 | ||
| Nominal resistance tempco | RAB/T | 100 | ppm/°C | TA = -40°C to +85°C | 5 | ||
| Nominal resistance tempco | RAB/T | 150 | ppm/°C | TA = -40°C to +125°C | 5 | ||
| Ratiometric tempco | VWB/T | 15 | ppm/°C | Code = Midscale (80h or 40h) | 5 |
CAD (KiCad official)
- Symbol:
MCP4631T-103E - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
mcp4631t-103e-etched.step/mcp4631t-103e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mcp4631t-103e.step/mcp4631t-103e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (102 pp, sha256
ee77464c39584a73, retrieved 2026-10-28, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).