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AP2121AK-3.0TRG1

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Diodes Incorporated Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)ap2121ak-3.0trg1factory-2.0.0extractor-text

Verified AP2121AK-3.0TRG1

by Ray · last 13 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

13 Nov 2026RayPublished by the parts factory: tier mfr, 5 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • •array (skip): not an array of element pairs
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: AP2121AK-3.0TRG1 · SOT-23-5 · 5 pins
  • ✓copper: 5 copper pads, none touching another net
  • ✓datasheet: all 5 pin names found in the 28-page datasheet
  • ✓distributor: lcsc C7076816, digikey 31-AP2121AK-3.0TRG1TR-ND, mouser 621-AP2121AK-3.0TRG1
  • ✓family: SOT-23-5
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-a6fz5gt5/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height and body within the datasheet's package drawing (datasheet p.23)
  • ✓pads: 5 pins = 5 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 5 pins agree
  • ✓symbol_text: no pin names collide
  • ✓viewers: viewers/footprint.html 19 kB, viewers/symbol.html 8 kB
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ ap2121ak-3-0trg1.kicad_sym✓ ap2121ak-3-0trg1.kicad_mod✓ ap2121ak-3-0trg1.step
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3D Model

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Symbol & Footprint

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PCB Footprint

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Datasheet

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Contents

README

markdown

AP2121AK-3.0TRG1

Diodes Incorporated · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5

AP2121AK-3.0TRG1 from Diodes Incorporated, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model). Symbol and footprint from KiCad-official CAD; the 3D model is generated from the datasheet's package dimensions.

Pinout

Pin Name Type Function
1 VIN power_in Input voltage pin; the datasheet recommends an input voltage of 2 V to 6 V, and a 1 µF filter capacitor is required at the input.
2 GND power_in Ground reference pin for the regulator.
3 CE input Active-high enable input: logic high enables the regulator and logic low puts it in shutdown; the AK (Active High) variant has a built-in pull-down resistor (2.5 to 10 MΩ), with CE high minimum 1.5 V and CE low maximum 0.25 V.
4 NC unconnected No connection pin on the SOT-23-5 package.
5 VOUT power_out Regulated output voltage; the output needs a filter capacitor of more than 1 µF with ESR between 0.01 Ω and 100 Ω for stability, and ceramic capacitors are recommended.

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package SOT-23-5
Category Power Management (PMIC)
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Output Voltage VOUT 2.94 3 3.06 V VIN = 4V, 1mA ≤ IOUT ≤ 30mA 11
Input Voltage VIN 6 V 11
Output Current IOUT 200 mA VIN-VOUT = 1V 11
Load Regulation VRLOAD 12 40 mV VIN = 4V, 1mA ≤ IOUT ≤ 80mA 11
Line Regulation VRLINE 4 16 mV 3.5V ≤ VIN ≤ 6V, IOUT = 30mA 11
Dropout Voltage VDROP 20 40 mV IOUT = 10mA 11
Dropout Voltage VDROP 150 300 mV IOUT = 100mA 11
Dropout Voltage VDROP 200 400 mV IOUT = 150mA 11
Dropout Voltage VDROP 250 500 mV IOUT = 200mA 11
Quiescent Current IQ 25 50 µA VIN = 4V, IOUT = 0mA 11
Standby Current ISTD 0.1 1 µA VIN = 4V, VCE in OFF mode 11
CE "High" Voltage 1.5 V CE input voltage "High" 11
CE "Low" Voltage 0.25 V CE input voltage "Low" 11
CE Pull-Down Resistance RPD 2.5 5 10 MΩ 11
Input Voltage VIN 6.5 V 3
Enable Input Voltage VCE -0.3 V Upper limit printed as VIN +0.3 V 3
Output Current IOUT 300 mA 3
Junction Temperature TJ 150 °C 3
Storage Temperature Range TSTG -65 150 °C 3
Lead Temperature (Soldering, 10 sec) TLEAD 260 °C Soldering, 10 sec 3
ESD (Human Body Model) ESD 2000 V Human Body Model 3
ESD (Machine Model) ESD 200 V Machine Model 3
Input Voltage VIN 2 6 V 3
Operating Ambient Temperature Range TA -40 85 °C 3
Thermal Resistance (Junction to Ambient), SOT-23-5 θJA 250 °C/W Note 3; SOT-23-5 package 3
Thermal Resistance (Junction to Case), SOT-23-5 θJC 74 °C/W Junction to case; SOT-23-5 package 11

CAD (land: KiCad; 3D: generated from the datasheet)

  • Symbol: AP2121AK-3.0TRG1
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5, generated on the KiCad land (body 1.6 x 2.96 mm, terminals on the pads, 1.45 mm tall, datasheet A, max). KiCad's stock model for this land is taller than the datasheet allows, so the model is generated from the datasheet drawing; the dimensions come from the datasheet drawing where it was read and are defaults otherwise (see provenance.model_3d_generated), not the manufacturer's CAD (STEP)
  • 3D model files: ap2121ak-3-0trg1-etched.step / ap2121ak-3-0trg1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ap2121ak-3-0trg1.step / ap2121ak-3-0trg1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (28 pp, sha256 41e2a9b4a27eea83, retrieved 2026-11-13, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: land: KiCad official libraries (CC-BY-SA 4.0); 3D: generated from the datasheet's package dimensions (provenance.model_3d_generated).

Datasheet PDF