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CBM811ZST4
Public Made by Adomby adom
Corebai Microelectronics Monitors & Reset Circuits, SOT-143-4. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownCBM811ZST4
Corebai Microelectronics · Monitors & Reset Circuits · SOT-143-4
CBM811ZST4 from Corebai Microelectronics, in a SOT-143-4. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground, 0 V supply reference. |
| 2 | RESET | output | Active-low logic reset output (CBM811 variant); stays asserted low down to VCC = 1 V and is held active for about 240 ms (typ) after VCC rises above the reset threshold. |
| 3 | MR | input | Debounced manual reset input; signals shorter than 100 ns are ignored and inputs longer than 10 µs trigger a reset, with an internal pull-up of 10 to 30 kΩ. |
| 4 | VCC | power_in | Monitored supply voltage input (2.5 V, 3 V, 3.3 V or 5 V systems); absolute maximum -0.3 V to +6 V, with a 2.32 V reset threshold for the CBM811Z. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Corebai Microelectronics |
| Package | SOT-143-4 |
| Category | Power Supply Chip |
| Pins | 4 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | 1 | 5.5 | V | 5 | ||
| Supply current | 8 | 15 | μA | 5 | |||
| Reset threshold (CBM811Z) | 2.28 | 2.32 | 2.35 | V | TA = −40°C to +85°C | 5 | |
| Reset threshold (CBM811Z), wide limit | 2.25 | 2.38 | V | TA = −40°C to +85°C | 5 | ||
| Manual reset pull-up resistance | 10 | 20 | 30 | kΩ | 5 | ||
| Manual reset minimum pulse width | 10 | μs | 5 | ||||
| Manual reset glitch immunity | 100 | ns | 5 | ||||
| Manual reset to reset propagation delay | 0.5 | μs | 5 | ||||
| MR input high threshold | 0.7 | V | Input greater than 0.7VCC (printed as 0.7VCC V) | 5 | |||
| VCC terminal voltage | VCC | -0.3 | 6 | V | relative to GND | 4 | |
| VCC input current | 20 | mA | 4 | ||||
| MR input current | 20 | mA | 4 | ||||
| RESET output current | 20 | mA | 4 | ||||
| Power dissipation (SOT-143) | 200 | mW | TA = 70°C; derate 4 mW/°C above 70°C | 4 | |||
| Operating temperature range | -40 | 85 | °C | 4 | |||
| Storage temperature range | -65 | 160 | °C | 4 | |||
| Lead temperature (soldering, 10 s) | 300 | °C | 10 seconds | 4 | |||
| ESD rating | 3 | kV | 4 | ||||
| Thermal resistance junction to ambient | θJA | 330 | °C/W | SOT-143 | 4 |
CAD (KiCad official)
- Symbol:
CBM811ZST4 - Footprint:
Package_TO_SOT_SMD:SOT-143 - 3D model: SOT-143-4 (KiCad packages3D, STEP)
- 3D model files:
cbm811zst4-etched.step/cbm811zst4-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cbm811zst4.step/cbm811zst4.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Corebai Microelectronics datasheet (10 pp, sha256
eca50a375d8a7fde, retrieved 2026-10-23, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).