component
STM32C031C4T6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
README
markdownSTM32C031C4T6
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)
STM32C031C4T6 from STMicroelectronics, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PC13 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM1_ETR and TIM1_BKIN, and additional functions RTC_TS, RTC_OUT1 and WKUP2. |
| 2 | PC14-OSCX_IN | bidirectional | 5 V-tolerant I/O (FT) that also serves as the OSCX_IN oscillator input, with alternate functions USART1_TX, TIM1_ETR, TIM1_BKIN2, IR_OUT, USART2_RTS_DE_CK, TIM17_CH1, TIM3_CH2, I2C1_SDA and EVENTOUT. |
| 3 | PC15-OSCX_OUT | bidirectional | 5 V-tolerant I/O (FT) that also serves as the OSCX_OUT oscillator output, with alternate functions OSC32_EN, OSC_EN, TIM1_ETR and TIM3_CH3. |
| 4 | PF3 | power_in | Listed as a supply-type pin (S) in Table 12 with no alternate or additional functions given; mapping to power_in follows the printed type and needs review. |
| 5 | VREF+ | power_in | Positive ADC reference voltage, 2 V minimum up to VDD (Table 54); internally connected to VDD/VDDA on packages without this pin. |
| 6 | VDD/VDDA | power_in | Standard operating supply voltage VDD from 2.0 V to 3.6 V, also the analog supply VDDA from 2.0 V to 3.6 V (Tables 24 and 54). |
| 7 | VSS/VSSA | power_in | Ground pin; all voltages in the datasheet are referenced to VSS, and this pin also serves as the analog ground VSSA. |
| 8 | PF0-OSC_IN | bidirectional | 5 V-tolerant I/O (FT) that also serves as the OSC_IN oscillator input, with alternate function TIM14_CH1. |
| 9 | PF1-OSC_OUT | bidirectional | 5 V-tolerant I/O (FT) that also serves as the OSC_OUT oscillator output, with alternate function OSC_EN. |
| 10 | PF2-NRST | bidirectional | Bidirectional reset pin (RST type) with embedded weak pull-up, also usable as a 5 V-tolerant I/O (FT) with alternate functions MCO and TIM1_CH4. |
| 11 | PA0 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions USART2_CTS, TIM16_CH1, USART1_TX and TIM1_CH1, and additional functions ADC_IN0 and WKUP1. |
| 12 | PA1 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions SPI1_SCK/I2S1_CK, USART2_RTS_DE_CK, TIM17_CH1, USART1_RX, TIM1_CH2, I2C1_SMBA and EVENTOUT, and additional function ADC_IN1. |
| 13 | PA2 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions SPI1_MOSI/I2S1_SD, USART2_TX, TIM16_CH1N, TIM3_ETR and TIM1_CH3, and additional functions ADC_IN2, WKUP4 and LSCO. |
| 14 | PA3 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions USART2_RX, TIM1_CH1N, TIM1_CH4 and EVENTOUT, and additional function ADC_IN3. |
| 15 | PA4 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions SPI1_NSS/I2S1_WS, USART2_TX, TIM1_CH2N, TIM14_CH1, TIM17_CH1N and EVENTOUT, and additional functions ADC_IN4 and RTC_OUT2. |
| 16 | PA5 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions SPI1_SCK/I2S1_CK, USART2_RX, TIM1_CH3N, TIM1_CH1 and EVENTOUT, and additional function ADC_IN5. |
| 17 | PA6 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions SPI1_MISO/I2S1_MCK, TIM3_CH1, TIM1_BKIN and TIM16_CH1, and additional function ADC_IN6. |
| 18 | PA7 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM1_CH1N, TIM14_CH1 and TIM17_CH1, and additional function ADC_IN7. |
| 19 | PB0 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions SPI1_NSS/I2S1_WS, TIM3_CH3 and TIM1_CH2N, and additional function ADC_IN17. |
| 20 | PB1 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM14_CH1, TIM3_CH4, TIM1_CH3N, TIM1_CH2N and EVENTOUT, and additional function ADC_IN18. |
| 21 | PB2 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions USART1_RX, MCO2 and EVENTOUT, and additional function ADC_IN19. |
| 22 | PB10 | bidirectional | 5 V-tolerant I/O (FT) with no alternate functions listed in AF tables and additional function ADC_IN20. |
| 23 | PB11 | bidirectional | 5 V-tolerant I/O (FT) with no alternate functions listed in AF tables and additional function ADC_IN21. |
| 24 | PB12 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM1_BKIN2, TIM1_BKIN and EVENTOUT, and additional function ADC_IN22. |
| 25 | PB13 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM1_CH1N and EVENTOUT. |
| 26 | PB14 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM1_CH2N and EVENTOUT. |
| 27 | PB15 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM1_CH3N and EVENTOUT, and additional function RTC_REFIN. |
| 28 | PA8 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions MCO, USART2_TX, TIM1_CH1, EVENTOUT, SPI1_NSS/I2S1_WS, TIM1_CH2N, TIM1_CH3N, TIM3_CH3, TIM3_CH4, TIM14_CH1, USART1_RX and MCO2, and additional function ADC_IN8. |
| 29 | PA9 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions MCO, USART1_TX, TIM1_CH2, TIM3_ETR, I2C1_SCL and EVENTOUT; PA9 can be remapped in place of PA11 using SYSCFG_CFGR1. |
| 30 | PC6 | bidirectional | 5 V-tolerant I/O (FT) with alternate function TIM3_CH1. |
| 31 | PC7 | bidirectional | 5 V-tolerant I/O (FT) with alternate function TIM3_CH2. |
| 32 | PA10 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions USART1_RX, TIM1_CH3, MCO2, TIM17_BKIN, I2C1_SDA and EVENTOUT; PA10 can be remapped in place of PA12 using SYSCFG_CFGR1. |
| 33 | PA11 [PA9] | bidirectional | 5 V-tolerant I/O (FT) with alternate functions SPI1_MISO/I2S1_MCK, USART1_CTS, TIM1_CH4 and TIM1_BKIN2, and additional function ADC_IN11; default mapping of PA9 remap is noted in Table 12. |
| 34 | PA12 [PA10] | bidirectional | 5 V-tolerant I/O (FT) with alternate functions SPI1_MOSI/I2S1_SD, USART1_RTS_DE_CK, TIM1_ETR and I2S_CKIN, and additional function ADC_IN12. |
| 35 | PA13 | bidirectional | 5 V-tolerant I/O (FT) configured as SWDIO after reset, with an internal pull-up active on reset, and alternate functions IR_OUT, TIM3_ETR, USART2_RX and EVENTOUT, plus additional function ADC_IN13. |
| 36 | PA14-BOOT0 | bidirectional | 5 V-tolerant I/O (FT) configured as SWCLK after reset, with an internal pull-down active on reset, also used as BOOT0 with additional function ADC_IN14, and alternate functions USART2_TX, EVENTOUT, SPI1_NSS/I2S1_WS, USART2_RX, TIM1_CH1, MCO2 and USART1_RTS_DE_CK. |
| 37 | PA15 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions SPI1_NSS/I2S1_WS, USART2_RX, TIM1_CH1, MCO2, USART1_RTS_DE_CK and EVENTOUT. |
| 38 | PD0 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions EVENTOUT and TIM16_CH1. |
| 39 | PD1 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions EVENTOUT and TIM17_CH1. |
| 40 | PD2 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM3_ETR and TIM1_CH1N. |
| 41 | PD3 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions USART2_CTS and TIM1_CH2N. |
| 42 | PB3 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions SPI1_SCK/I2S1_CK, TIM1_CH2, TIM3_CH2, USART1_RTS_DE_CK and EVENTOUT. |
| 43 | PB4 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions SPI1_MISO/I2S1_MCK, TIM3_CH1, USART1_CTS, TIM17_BKIN and EVENTOUT. |
| 44 | PB5 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM16_BKIN, TIM3_CH3 and I2C1_SMBA, and additional function WKUP6. |
| 45 | PB6 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions including USART1_TX, TIM1_CH3, TIM16_CH1N, USART1_CTS, I2C1_SCL, I2C1_SMBA, SPI1 signals, TIM1_CH2, TIM3 channels, TIM16_BKIN and TIM17_BKIN, and additional function WKUP3. |
| 46 | PB7 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions USART1_RX, TIM1_CH4, TIM17_CH1N, TIM3_CH4, I2C1_SDA, EVENTOUT, USART2_CTS, TIM16_CH1, TIM3_CH1 and I2C1_SCL. |
| 47 | PB8 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions USART2_CTS, TIM16_CH1, TIM3_CH1, I2C1_SCL and EVENTOUT. |
| 48 | PB9 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions IR_OUT, USART2_RTS_DE_CK, TIM17_CH1, TIM3_CH2, I2C1_SDA and EVENTOUT. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-48(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 48 |
CAD (KiCad official)
- Symbol:
STM32C031C4T6 - Footprint:
Package_QFP:LQFP-48_7x7mm_P0.5mm - 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
- 3D model files:
stm32c031c4t6-etched.step/stm32c031c4t6-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32c031c4t6.step/stm32c031c4t6.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (108 pp, sha256
c0de50247b672919, retrieved 2026-10-11, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).