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ISL31472EIBZ

Public Made by Adom

by adom

RENESAS Pre-ordered Chips, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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ISL31472EIBZ

RENESAS · Pre-ordered Chips · SOIC-8

ISL31472EIBZ from RENESAS, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RO output Receiver output goes high when A-B is above -10mV and low when A-B is below -200mV, and is high when the inputs are floating, shorted, or on an undriven terminated bus.
2 RE input Receiver output enable: RO is enabled when RE is low and is high impedance when RE is high, with RE internally pulled low.
3 DE input Driver output enable: the driver outputs are enabled when DE is high and are high impedance when DE is low, with DE internally pulled high.
4 DI input Driver input: a low on DI forces output Y low and Z high, and a high on DI forces Y high and Z low.
5 GND power_in Ground connection for the device.
6 A/Y bidirectional ±60V fault protected RS-485/RS-422 non-inverting receiver input and driver output; the pin is an input when DE is low and an output when DE is high.
7 B/Z bidirectional ±60V fault protected RS-485/RS-422 inverting receiver input and driver output; the pin is an input when DE is low and an output when DE is high.
8 VCC power_in System power supply input, specified from 4.5V to 5.5V.

Key specifications

Parameter Value
Manufacturer RENESAS
Package SOIC-8
Category Interface ICs
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC to ground VCC 7 V 5
Input/output voltage (A/Y, B/Z, A, B, Y, Z) -60 60 V 5
Input/output voltage transient pulse (A/Y, B/Z, A, B, Y, Z) -80 80 V Transient pulse through 100Ω, Note 17 5
Maximum junction temperature (plastic package) 150 °C 5
Maximum storage temperature range -65 150 °C 5
Supply voltage (VCC) VCC 4.5 5 5.5 V Test conditions: VCC = 4.5V to 5.5V; typicals at VCC = 5V, TA = +25°C 5
Temperature range -40 85 °C 5
Bus pin common-mode voltage range -15 15 V 5
Driver differential VOUT (loaded) VOD2 2.4 3.2 V RL = 100Ω (RS-422) 5
Driver differential VOUT (loaded) VOD2 1.5 2.5 V RL = 54Ω (RS-485) 5
Driver differential VOUT (loaded, PROFIBUS) VOD2 2 2.5 V RL = 54Ω (PROFIBUS, VCC ≥ 5V) 5
Driver differential VOUT (six 120Ω terminations) VOD2 0.8 1.3 V RL = 21Ω (Six 120Ω terminations for star configurations, VCC ≥ 4.75V) 5
Change in magnitude of driver differential VOUT for complementary output states VOD 0.2 V RL = 54Ω or 100Ω (Figure 5A) 5
Driver differential VOUT with common-mode load VOD3 1.5 2.1 V RL = 60Ω, -7V ≤ VCM ≤ 12V 5
Driver differential VOUT with common-mode load VOD3 1.7 2.3 V RL = 60Ω, -15V ≤ VCM ≤ 15V (VCC ≥ 4.75V) 5
Driver common-mode VOUT VOC -1 3 V RL = 54Ω or 100Ω 5
Change in magnitude of driver common-mode VOUT for complementary output states VOC 0.2 V RL = 54Ω or 100Ω (Figure 5A) 5
Driver short-circuit current IOSD -250 250 mA DE = VCC, -15V ≤ VO ≤ 15V (Note 10) 5
Driver short-circuit current at first fold-back IOSD1 -83 83 mA 22V ≤ VO ≤ -22V 5
Driver short-circuit current at second fold-back IOSD2 -13 13 mA 35V ≤ VO ≤ -35V 5
Logic input high voltage VIH 2.5 V DE, DI, RE 5
Logic input low voltage VIL 0.8 V DE, DI, RE 5
Logic input current IIN1 -1 1 µA DI 6
Logic input current IIN1 -15 6 15 µA DE, RE 6
Input/output current (A/Y, B/Z) IIN2 110 250 µA DE = 0V, VCC = 0V or 5.5V; VIN = 12V 6
Input/output current (A/Y, B/Z) IIN2 -200 -75 µA DE = 0V, VCC = 0V or 5.5V; VIN = -7V 6
Input/output current (A/Y, B/Z) IIN2 -800 240 800 µA DE = 0V, VCC = 0V or 5.5V; VIN = ±15V 6
Input/output current (A/Y, B/Z) IIN2 -6 0.5 6 mA DE = 0V, VCC = 0V or 5.5V; VIN = ±60V (Note 18) 6
Receiver differential threshold voltage VTH -200 -100 -10 mV -15V ≤ VCM ≤ 15V 6
Receiver output high voltage VOH 2.8 4.2 V IO = -8mA, VID = -10mV 6
Receiver output low voltage VOL 0.27 0.4 V IO = 6mA, VID = -200mV 6
Receiver output low current IOL 15 22 mA VO = 1V, VID = -200mV 6
Three-state (high impedance) receiver output current IOZR -1 0.01 1 µA 0V ≤ VO ≤ VCC 6
Receiver short-circuit current IOSR 12 110 mA 0V ≤ VO ≤ VCC 6
No-load supply current ICC 2.3 4.5 mA DE = VCC, RE = 0V or VCC, DI = 0V or VCC 6
Shutdown supply current ISHDN 10 50 µA DE = 0V, RE = VCC, DI = 0V or VCC 6
Driver differential output delay tPLH, tPHL 320 450 ns RD = 54Ω, CD = 50pF (Figure 6) 6
Driver differential output skew tSKEW 6 30 ns RD = 54Ω, CD = 50pF (Figure 6) 6
Driver differential rise or fall time tR, tF 400 650 1200 ns RD = 54Ω, CD = 50pF (Figure 6) 6
Maximum data rate (driver) fMAX 0.25 1.5 Mbps CD = 820pF (Figure 8) 6
Driver enable to output high tZH 1200 ns SW = GND (Figure 7), (Note 11) 7
Driver enable to output low tZL 1200 ns SW = VCC (Figure 7), (Note 11) 7
Driver disable from output low tLZ 120 ns SW = VCC (Figure 7) 7
Driver disable from output high tHZ 120 ns SW = GND (Figure 7) 7
Time to shutdown tSHDN 60 160 600 ns (Note 13) 7
Driver enable from shutdown to output high tZH(SHDN) 2500 ns SW = GND (Figure 7), (Notes 13, 14) 7
Driver enable from shutdown to output low tZL(SHDN) 2500 ns SW = VCC (Figure 7), (Notes 13, 14) 7
Maximum data rate (receiver) fMAX 0.25 5 Mbps (Figure 9) 7
Receiver input to output delay tPLH, tPHL 200 280 ns (Figure 9) 7
Receiver skew tSKD 4 10 ns (Figure 9) 7
Receiver enable to output low tZL 50 ns RL = 1kΩ, CL = 15pF, SW = VCC (Figure 10), (Note 12) 8
Receiver enable to output high tZH 50 ns RL = 1kΩ, CL = 15pF, SW = GND (Figure 10), (Note 12) 8
Receiver disable from output low tLZ 50 ns RL = 1kΩ, CL = 15pF, SW = VCC (Figure 10) 8
Receiver disable from output high tHZ 50 ns RL = 1kΩ, CL = 15pF, SW = GND (Figure 10) 8
Time to shutdown (receiver) tSHDN 60 160 600 ns (Note 13) 8
Thermal resistance junction to ambient (8 Ld SOIC) JA 116 °C/W 8 Ld SOIC Package (Notes 6, 7) 5
Thermal resistance junction to case (8 Ld SOIC) JC 47 °C/W 8 Ld SOIC Package (Notes 6, 7) 5
Output high voltage (receiver, low IO) VOH 4.75 V IO = -2mA, VID = -10mV 6

CAD (KiCad official)

  • Symbol: ISL31472EIBZ
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: isl31472eibz-etched.step / isl31472eibz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); isl31472eibz.step / isl31472eibz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: RENESAS datasheet (21 pp, sha256 2e52c6ab7c9d4f87, retrieved 2026-10-28, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF