component
TPS563240DDCT
Public Made by Adomby adom
Texas Instruments DC-DC Converters, TSOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTPS563240DDCT
Texas Instruments · DC-DC Converters · TSOT-23-6
TPS563240DDCT from Texas Instruments, in a TSOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground pin and source terminal of the low-side power NFET as well as the ground terminal for the controller circuit; connect sensitive VFB to this GND at a single point. |
| 2 | SW | passive | Switch node connection between the high-side NFET and the low-side NFET. |
| 3 | VIN | power_in | Input voltage supply pin and drain terminal of the high-side power NFET, operating range 4.5 V to 17 V. |
| 4 | VFB | input | Converter feedback input; connect to the output voltage with a feedback resistor divider. |
| 5 | EN | input | Enable input control, active high, and must be pulled up to enable the device. |
| 6 | VBST | passive | Supply input for the high-side NFET gate drive circuit; connect a 0.1 µF capacitor between VBST and SW pins. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSOT-23-6 |
| Category | Power Supply Chip |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage VIN | VIN | -0.3 | 19 | V | 4 | ||
| Input voltage VBST | VBST | -0.3 | 24.5 | V | 4 | ||
| Input voltage VBST (10 ns transient) | VBST | -0.3 | 26.5 | V | 10 ns transient | 4 | |
| Input voltage VBST (vs SW) | VBST | -0.3 | 5.5 | V | vs SW | 4 | |
| Input voltage VFB | VFB | -0.3 | 5.5 | V | 4 | ||
| Input voltage SW | SW | -2 | 19 | V | 4 | ||
| Input voltage SW (10 ns transient) | SW | -3.5 | 21 | V | 10 ns transient | 4 | |
| Input voltage EN | EN | -0.3 | V | max VIN + 0.3 V | 4 | ||
| Operating junction temperature | TJ | -40 | 150 | °C | 4 | ||
| Storage temperature | Tstg | -55 | 150 | °C | 4 | ||
| ESD HBM | V(ESD) | -2000 | 2000 | V | Human-body model, ANSI/ESDA/JEDEC JS-001 | 4 | |
| ESD CDM | V(ESD) | -500 | 500 | V | Charged-device model, JESD22-C101 | 4 | |
| Supply input voltage range | VIN | 4.5 | 17 | V | 4 | ||
| EN input voltage range | EN | -0.1 | V | max VIN | 4 | ||
| Operating junction temperature | TJ | -40 | 125 | °C | 4 | ||
| Junction-to-ambient thermal resistance | RθJA | 117.1 | °C/W | DDC (SOT) 6 pins | 4 | ||
| Junction-to-case (top) thermal resistance | RθJC(top) | 57.3 | °C/W | 4 | |||
| Junction-to-board thermal resistance | RθJB | 31.2 | °C/W | 4 | |||
| Junction-to-top characterization parameter | ψJT | 11.2 | °C/W | 4 | |||
| Junction-to-board characterization parameter | ψJB | 31.3 | °C/W | 4 | |||
| Operating non-switching supply current | IVIN | 235 | 300 | µA | VIN current, EN = 5 V, VFB = 0.7 V, TJ = 25°C | 5 | |
| Shutdown supply current | IVIN(SDN) | 2.5 | 10 | µA | VIN current, EN = 0 V, TJ = 25°C | 5 | |
| Enable threshold rising | VENH | 1.27 | 1.34 | V | Rising | 5 | |
| Enable threshold falling | VENL | 1.08 | 1.15 | V | Falling | 5 | |
| EN pin resistance to GND | REN | 800 | 1000 | 1200 | kΩ | VEN = 1 V | 5 |
| FB voltage | VFB | 594 | 600 | 606 | mV | Continuous mode operation, TJ = 25°C | 5 |
| FB voltage | VFB | 588 | 600 | 612 | mV | Continuous mode operation | 5 |
| FB input current | IFB | 0 | 50 | nA | VFB = 0.7 V | 5 | |
| High side FET source current limit | Iocl_h_source | 5.5 | 6.3 | 7.1 | A | 5 | |
| Low side FET source current limit | Iocl_l_source | 3.1 | 3.9 | 4.7 | A | 5 | |
| UVLO wake up VIN voltage | UVLO | 4.2 | 4.4 | V | Wake up VIN voltage | 5 | |
| UVLO shutdown VIN voltage | UVLO | 3.6 | 3.8 | V | Shutdown VIN voltage | 5 | |
| High-side switch resistance | RDS(on)h | 70 | mΩ | TJ = 25°C | 5 | ||
| Low-side switch resistance | RDS(on)l | 30 | mΩ | TJ = 25°C | 5 | ||
| Switching frequency | Fsw | 1400 | kHz | 5 | |||
| Minimum off time | tOFF(MIN) | 250 | ns | 5 | |||
| Soft-start time | tss | 1.7 | ms | Internal soft-start time | 5 |
CAD (KiCad official)
- Symbol:
TPS563240DDCT - Footprint:
Package_TO_SOT_SMD:TSOT-23-6 - 3D model: TSOT-23-6 (KiCad packages3D, STEP)
- 3D model files:
tps563240ddct-etched.step/tps563240ddct-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps563240ddct.step/tps563240ddct.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (26 pp, sha256
630f8645aee28512, retrieved 2026-10-23, tier: manufacturer) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).