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TLC27L4CDR

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Texas Instruments Operational Amplifier, SOIC-14. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

componentop-amp-cmptlc27l4cdr
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Contents

README

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TLC27L4CDR

Texas Instruments · Operational Amplifier · SOIC-14

TLC27L4CDR from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OUT output Output of op-amp channel 1. Output voltage range includes the negative rail.
2 1IN- input Inverting input of op-amp channel 1. High input impedance (~10^12 Ω typ).
3 1IN+ input Non-inverting input of op-amp channel 1. Common-mode range extends below the negative rail (C/I suffix types).
4 VDD power_in Positive supply voltage. Recommended operating range 3 V to 16 V (C suffix), 4 V to 16 V (I/M suffix). Absolute maximum 18 V.
5 2IN+ input Non-inverting input of op-amp channel 2. High input impedance (~10^12 Ω typ).
6 2IN- input Inverting input of op-amp channel 2. High input impedance (~10^12 Ω typ).
7 2OUT output Output of op-amp channel 2. Output voltage range includes the negative rail.
8 3OUT output Output of op-amp channel 3. Output voltage range includes the negative rail.
9 3IN- input Inverting input of op-amp channel 3. High input impedance (~10^12 Ω typ).
10 3IN+ input Non-inverting input of op-amp channel 3. High input impedance (~10^12 Ω typ).
11 GND power_in Ground / negative supply. All voltages referenced to network ground. Total current out of GND rated 45 mA maximum.
12 4IN+ input Non-inverting input of op-amp channel 4. High input impedance (~10^12 Ω typ).
13 4IN- input Inverting input of op-amp channel 4. High input impedance (~10^12 Ω typ).
14 4OUT output Output of op-amp channel 4. Output voltage range includes the negative rail.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-14
Category Op-amp/Cmp
Pins 14

Ordering variants

Same part, different packaging or reel option.

  • TLC27L4CDR
  • TLC27L4CDRACD
  • TLC27L4CDRACDR
  • TLC27L4CDRBCD
  • TLC27L4CDRBCDR
  • TLC27L4CDRID
  • TLC27L4CDRIDR
  • TLC27L4CDRAID
  • TLC27L4CDRAIDR
  • TLC27L4CDRBID
  • TLC27L4CDRBIDR
  • TLC27L4CDRCN
  • TLC27L4CDRACN
  • TLC27L4CDRBCN
  • TLC27L4CDRIN
  • TLC27L4CDRAIN
  • TLC27L4CDRBIN
  • TLC27L4CDRMN
  • TLC27L4CDRMJN
  • TLC27L4CDRCPW
  • TLC27L4CDRMJ
  • TLC27L4CDRMFK
  • TLC27L4CDRY

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input offset voltage (25 C) VIO 1.1 10 mV VDD = 5 V; VO = 1.4 V, VIC = 0, RS = 50 Ω, RL = 1 MΩ, 25°C 6
Input offset voltage (full range) VIO 12 mV VDD = 5 V; VO = 1.4 V, VIC = 0, RS = 50 Ω, RL = 1 MΩ, full range 6
Input offset current (70 C) IIO 7 300 pA VDD = 5 V; VO = 2.5 V, VIC = 2.5 V, 70°C 6
Input bias current (70 C) IIB 40 600 pA VDD = 5 V; VO = 2.5 V, VIC = 2.5 V, 70°C 6
Common-mode input voltage range (25 C) VICR -0.3 4.2 V VDD = 5 V; 25°C (see Note 5) 6
Common-mode input voltage range (full range) VICR -0.2 3.5 V VDD = 5 V; full range (see Note 5) 6
High-level output voltage (25 C) VOH 3.2 4.1 V VDD = 5 V; VID = 100 mV, RL = 1 MΩ, 25°C 6
High-level output voltage (0 C) VOH 3 4.1 V VDD = 5 V; VID = 100 mV, RL = 1 MΩ, 0°C 6
High-level output voltage (70 C) VOH 3 4.2 V VDD = 5 V; VID = 100 mV, RL = 1 MΩ, 70°C 6
Low-level output voltage (25 C) VOL 0 50 mV VDD = 5 V; VID = -100 mV, IOL = 0, 25°C 6
Large-signal differential voltage amplification (25 C) AVD 50 520 V/mV VDD = 5 V; VO = 2.5 V to 2 V, RL = 1 MΩ, 25°C 6
Large-signal differential voltage amplification (0 C) AVD 50 680 V/mV VDD = 5 V; VO = 2.5 V to 2 V, RL = 1 MΩ, 0°C 6
Large-signal differential voltage amplification (70 C) AVD 50 380 V/mV VDD = 5 V; VO = 2.5 V to 2 V, RL = 1 MΩ, 70°C 6
Common-mode rejection ratio (25 C) CMRR 65 94 dB VDD = 5 V; VIC = VICRmin, 25°C 6
Common-mode rejection ratio (0 C) CMRR 60 95 dB VDD = 5 V; VIC = VICRmin, 0°C 6
Common-mode rejection ratio (70 C) CMRR 60 95 dB VDD = 5 V; VIC = VICRmin, 70°C 6
Supply-voltage rejection ratio (25 C) kSVR 70 97 dB VDD = 5 V to 10 V, VO = 1.4 V, 25°C 6
Supply-voltage rejection ratio (0 C) kSVR 60 97 dB VDD = 5 V to 10 V, VO = 1.4 V, 0°C 6
Supply-voltage rejection ratio (70 C) kSVR 60 98 dB VDD = 5 V to 10 V, VO = 1.4 V, 70°C 6
Supply current, four amplifiers (25 C) IDD 40 68 µA VDD = 5 V; VO = 2.5 V, VIC = 2.5 V, no load, 25°C 6
Supply current, four amplifiers (0 C) IDD 48 84 µA VDD = 5 V; VO = 2.5 V, VIC = 2.5 V, no load, 0°C 6
Supply current, four amplifiers (70 C) IDD 31 56 µA VDD = 5 V; VO = 2.5 V, VIC = 2.5 V, no load, 70°C 6
Input offset voltage (25 C) VIO 1.1 10 mV VDD = 10 V; VO = 1.4 V, VIC = 0, RS = 50 Ω, RL = 1 MΩ, 25°C 7
Input offset voltage (full range) VIO 12 mV VDD = 10 V; VO = 1.4 V, VIC = 0, RS = 50 Ω, RL = 1 MΩ, full range 7
Input offset current (70 C) IIO 7 300 pA VDD = 10 V; VO = 5 V, VIC = 5 V, 70°C 7
Input bias current (70 C) IIB 50 600 pA VDD = 10 V; VO = 5 V, VIC = 5 V, 70°C 7
Common-mode input voltage range (25 C) VICR -0.3 9.2 V VDD = 10 V; 25°C (see Note 5) 7
Common-mode input voltage range (full range) VICR -0.2 8.5 V VDD = 10 V; full range (see Note 5) 7
High-level output voltage (25 C) VOH 8 8.9 V VDD = 10 V; VID = 100 mV, RL = 1 MΩ, 25°C 7
High-level output voltage (0 C) VOH 7.8 8.9 V VDD = 10 V; VID = 100 mV, RL = 1 MΩ, 0°C 7
High-level output voltage (70 C) VOH 7.8 8.9 V VDD = 10 V; VID = 100 mV, RL = 1 MΩ, 70°C 7
Low-level output voltage (25 C) VOL 0 50 mV VDD = 10 V; VID = -100 mV, IOL = 0, 25°C 7
Large-signal differential voltage amplification (25 C) AVD 50 870 V/mV VDD = 10 V; VO = 1 V to 6 V, RL = 1 MΩ, 25°C 7
Large-signal differential voltage amplification (0 C) AVD 50 1020 V/mV VDD = 10 V; VO = 1 V to 6 V, RL = 1 MΩ, 0°C 7
Large-signal differential voltage amplification (70 C) AVD 50 660 V/mV VDD = 10 V; VO = 1 V to 6 V, RL = 1 MΩ, 70°C 7
Common-mode rejection ratio (25 C) CMRR 65 97 dB VDD = 10 V; VIC = VICRmin, 25°C 7
Common-mode rejection ratio (0 C) CMRR 60 97 dB VDD = 10 V; VIC = VICRmin, 0°C 7
Common-mode rejection ratio (70 C) CMRR 60 97 dB VDD = 10 V; VIC = VICRmin, 70°C 7
Supply-voltage rejection ratio (25 C) kSVR 70 97 dB VDD = 5 V to 10 V, VO = 1.4 V, 25°C 7
Supply-voltage rejection ratio (0 C) kSVR 60 97 dB VDD = 5 V to 10 V, VO = 1.4 V, 0°C 7
Supply-voltage rejection ratio (70 C) kSVR 60 98 dB VDD = 5 V to 10 V, VO = 1.4 V, 70°C 7
Supply current, four amplifiers (25 C) IDD 57 92 µA VDD = 10 V; VO = 5 V, VIC = 5 V, no load, 25°C 7
Supply current, four amplifiers (0 C) IDD 72 132 µA VDD = 10 V; VO = 5 V, VIC = 5 V, no load, 0°C 7
Supply current, four amplifiers (70 C) IDD 44 80 µA VDD = 10 V; VO = 5 V, VIC = 5 V, no load, 70°C 7
Supply voltage VDD 3 16 V C suffix 5
Common-mode input voltage VIC -0.2 3.5 V VDD = 5 V, C suffix 5
Common-mode input voltage VIC -0.2 8.5 V VDD = 10 V, C suffix 5
Operating free-air temperature TA 0 70 °C C suffix 5
Supply voltage VDD 18 V see Note 1 5
Input voltage range VI -0.3 V any input; upper limit printed as VDD 5
Input current II -5 5 mA 5
Output current (each output) IO -30 30 mA each output 5
Total current into VDD 45 mA 5
Total current out of GND 45 mA 5
Operating free-air temperature TA 0 70 °C C suffix 5
Storage temperature range Tstg -65 150 °C 5
Lead temperature 260 °C D package; 1,6 mm (1/16 inch) from case for 10 seconds 5
Continuous total dissipation 950 mW D package; TA ≤ 25°C 5
Derating factor above TA = 25 C 7.6 mW/°C D package; above TA = 25°C 5

CAD (KiCad official)

  • Symbol: TLC27L4CDR
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: tlc27l4cdr-etched.step / tlc27l4cdr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlc27l4cdr.step / tlc27l4cdr.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
tlc27l4cdr.step 195 KB You want the bare part, or you mark your own boards.
tlc27l4cdr-etched.step 2.0 MB You want the part with TLC27L4CDR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 512 faces against 237 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (43 pp, sha256 86ea7b0c449851f7, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF