AD797ANZ from Analog Devices, in a PDIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	OFFSET NULL	passive	Offset null terminal for trimming input offset voltage; the datasheet specifies input offset voltage of 80 μV maximum for AD797A and 40 μV maximum for AD797B at ±15 V.
2	-IN	input	Inverting input; input common-mode voltage range is ±11 V minimum at ±15 V supply and ±2.5 V minimum at ±5 V supply.
3	+IN	input	Noninverting input; differential input voltage is limited to ±0.7 V absolute maximum, with the inputs protected by back-to-back diodes.
4	-VS	power_in	Negative power supply; specified operating range is ±5 V to ±18 V with an absolute maximum supply voltage of ±18 V.
5	OFFSET NULL	passive	Offset null terminal for trimming input offset voltage; the datasheet specifies input offset voltage of 80 μV maximum for AD797A and 40 μV maximum for AD797B at ±15 V.
6	OUTPUT	output	Amplifier output; output current is 30 mA minimum and 50 mA typical for
7	+VS	power_in	Positive power supply; specified operating range is ±5 V to ±18 V with an absolute maximum supply voltage of ±18 V.
8	DECOMPENSATION AND DISTORTION NEUTRALIZATION	passive	Decompensation and distortion neutralization pin; the 110 MHz gain bandwidth at G = 1000 is specified using an external decompensation capacitor.

Key specifications

Parameter	Value
Manufacturer	Analog Devices
Package	PDIP-8
Category	RF & Radio
Pins	8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Input offset voltage	VOS		25	80	μV	±5 V, ±15 V	3
Input offset voltage, TMIN to TMAX	VOS		50		μV	TMIN to TMAX	3
Offset voltage drift			0.2	1	μV/°C	±5 V, ±15 V	3
Input bias current	IB		0.25	1.5	μA	±5 V, ±15 V	3
Input bias current, TMIN to TMAX	IB		0.5	3	μA	TMIN to TMAX	3
Input offset current	IOS		100	400	nA	±5 V, ±15 V	3
Input offset current, TMIN to TMAX	IOS		120		nA	TMIN to TMAX	3
Open-loop gain	AOL	1	20		V/μV	VOUT = ±10 V, ±15 V	3
Open-loop gain, RLOAD = 2 kΩ	AOL	1	6		V/μV	RLOAD = 2 kΩ	3
Open-loop gain, RLOAD = 2 kΩ, TMIN to TMAX	AOL	1	15		V/μV	TMIN to TMAX	3
Open-loop gain, RLOAD = 600 Ω	AOL	1	5		V/μV	RLOAD = 600 Ω	3
Open-loop gain at 20 kHz	AOL	14000	20000		V/V	At 20 kHz	3
Slew rate	SR	12.5	20		V/μs	RLOAD = 1 kΩ, ±15 V	3
Settling time to 0.0015%	tS		800	1200	ns	10 V step, ±15 V	3
Common-mode rejection	CMR	114	130		dB	VCM = CMVR, ±5 V, ±15 V	3
Common-mode rejection, TMIN to TMAX	CMR	110	120		dB	VCM = CMVR, TMIN to TMAX	3
Power supply rejection	PSR	114	130		dB	VS = ±5 V to ±18 V	3
Power supply rejection, TMIN to TMAX	PSR	110	120		dB	VS = ±5 V to ±18 V, TMIN to TMAX	3
Input voltage noise density at 10 Hz	en		1.7	2.5	nV/√Hz	f = 10 Hz, ±15 V	3
Input voltage noise density at 1 kHz	en		0.9	1.2	nV/√Hz	f = 1 kHz, ±15 V	3
Input voltage noise, 10 Hz to 1 MHz	en		1	1.3	μV rms	f = 10 Hz to 1 MHz, ±15 V	3
Input common-mode voltage range	CMVR	11	12		V	±15 V	3
Input common-mode voltage range	CMVR	2.5	3		V	±5 V	3
Output voltage swing	VOUT	12	13		V	RLOAD = 2 kΩ, ±15 V	3
Output voltage swing	VOUT	11	13		V	RLOAD = 600 Ω, ±15 V	3
Output voltage swing	VOUT	2.5	3		V	RLOAD = 600 Ω, ±5 V	3
Output current	IOUT	30	50		mA	±5 V, ±15 V	3
Total harmonic distortion	THD		-98	-90	dB	RLOAD = 1 kΩ, CN = 50 pF, f = 250 kHz, 3 V rms, ±15 V	3
Total harmonic distortion	THD		-120	-110	dB	RLOAD = 1 kΩ, f = 20 kHz, 3 V rms, ±15 V	3
Operating range	VS	5		18	V		4
Quiescent current	IQ		8.2	10.5	mA	±5 V, ±15 V	4
Supply voltage				18	V		5
Differential input voltage		-0.7		0.7	V		5
Storage temperature range (N, R suffix)	TSTG	-65		125	°C		5
Operating temperature range	TA	-40		85	°C		5
Lead temperature				300	°C	Soldering 60 sec	5
Thermal resistance, junction-to-ambient, 8-lead PDIP (N-8)	θJA		103		°C/W	2-layer JEDEC PCB, zero airflow	5
Thermal resistance, junction-to-case, 8-lead PDIP (N-8)	θJC		50		°C/W		5

CAD (KiCad official)

Symbol: AD797ANZ
Footprint: Package_DIP:DIP-8_W7.62mm
3D model: PDIP-8 (KiCad packages3D, STEP)
3D model files: ad797anz-etched.step / ad797anz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ad797anz.step / ad797anz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Analog Devices datasheet (19 pp, sha256 122b0a0611b5f64a, retrieved 2026-10-30, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

AD797ANZ

Verified AD797ANZ

Verification log 1 record

3D Model

Symbol & Footprint

Schematic Symbol

PCB Footprint

Datasheet

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