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STM8L152M8T6TR
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-80(14x14). Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSTM8L152M8T6TR
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-80(14x14)
STM8L152M8T6TR from STMicroelectronics, in a LQFP-80(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PH0/LCD_SEG36 | bidirectional | Port H bit 0 I/O pin, configurable as LCD segment 36 output; five-volt tolerant with high sink capability. |
| 2 | PH1/LCD_SEG37 | bidirectional | Port H bit 1 I/O pin, configurable as LCD segment 37 output; five-volt tolerant with high sink capability. |
| 3 | PH2/LCD_SEG38 | bidirectional | Port H bit 2 I/O pin, configurable as LCD segment 38 output; five-volt tolerant with high sink capability. |
| 4 | PH3/LCD_SEG39 | bidirectional | Port H bit 3 I/O pin, configurable as LCD segment 39 output; five-volt tolerant with high sink capability. |
| 5 | PA0/SWIM/BEEP/IR_TIM | bidirectional | Port A bit 0 I/O pin with high sink LED driver capability (80 mA), can be configured as SWIM interface, beeper output, or infrared timer output. |
| 6 | NRST/PA1 | bidirectional | Reset input pin with internal pull-up, or configurable as Port A bit 1 output push-pull only; hysteresis protected. |
| 7 | PA2/OSC_IN | bidirectional | Port A bit 2 I/O pin, configurable as high-speed external crystal oscillator input, USART1 transmit, or SPI1 master-in slave-out; five-volt tolerant with high sink capability. |
| 8 | PA3/OSC_OUT | bidirectional | Port A bit 3 I/O pin, configurable as high-speed external crystal oscillator output, USART1 receive, or SPI1 master-out slave-in; five-volt tolerant with high sink capability. |
| 9 | PA4/TIM2_BKIN/LCD_COM0 | bidirectional | Port A bit 4 I/O pin, configurable as Timer 2 break input, LCD common terminal 0, or ADC1 input channel 2; five-volt tolerant with high sink capability. |
| 10 | PA5/TIM3_BKIN/LCD_COM1 | bidirectional | Port A bit 5 I/O pin, configurable as Timer 3 break input, LCD common terminal 1, or ADC1 input channel 1; five-volt tolerant with high sink capability. |
| 11 | PA6/ADC1_TRIG/LCD_COM2 | bidirectional | Port A bit 6 I/O pin, configurable as ADC1 trigger input, LCD common terminal 2, or ADC1 input channel 0; five-volt tolerant with high sink capability. |
| 12 | PA7/LCD_SEG0/TIM5_CH1 | bidirectional | Port A bit 7 I/O pin, configurable as LCD segment 0 output or Timer 5 channel 1 capture/compare; five-volt tolerant with high sink capability. |
| 13 | VDD1 | power_in | Digital power supply pin; requires 1.65 V to 3.6 V with current up to 80 mA. |
| 14 | VSS1 | power_in | I/O ground connection pin; must be connected to external ground. |
| 15 | VDD1 | power_in | Digital power supply pin; requires 1.65 V to 3.6 V with current up to 80 mA. |
| 16 | VDDA | power_in | Analog power supply for ADC, DAC, and comparators; requires 1.8 V to 3.6 V when analog peripherals are used. |
| 17 | VREF+ | power_in | Positive voltage reference for ADC1 and DAC1/DAC2; requires 1.8 V to VDDA. |
| 18 | VLCD | passive | LCD booster external capacitor connection pin; connect 0.1 µF to 2 µF ceramic capacitor for LCD internal voltage booster. |
| 19 | PG1/LCD_SEG29 | bidirectional | Port G bit 1 I/O pin, configurable as LCD segment 29 output, USART3 transmit, or Timer 3 break input; five-volt tolerant with high sink capability. |
| 20 | PG2/LCD_SEG30 | bidirectional | Port G bit 2 I/O pin, configurable as LCD segment 30 output or USART3 synchronous clock; five-volt tolerant with high sink capability. |
| 21 | PG3/LCD_SEG31 | bidirectional | Port G bit 3 I/O pin, configurable as LCD segment 31 output or Timer 3 external trigger input; five-volt tolerant with high sink capability. |
| 22 | VLCD | passive | LCD booster external capacitor connection pin; connect 0.1 µF to 2 µF ceramic capacitor for LCD internal voltage booster. |
| 23 | PE0/LCD_SEG1 | bidirectional | Port E bit 0 I/O pin, configurable as LCD segment 1 output or Timer 5 channel 2 capture/compare; five-volt tolerant with high sink capability. |
| 24 | PE1/TIM1_CH2N | bidirectional | Port E bit 1 I/O pin, configurable as Timer 1 channel 2 complementary output or LCD segment 2 output; five-volt tolerant with high sink capability. |
| 25 | PE2/TIM1_CH3N | bidirectional | Port E bit 2 I/O pin, configurable as Timer 1 channel 3 complementary output, LCD segment 3 output, or configurable clock output; five-volt tolerant with high sink capability. |
| 26 | PE3/LCD_SEG4 | bidirectional | Port E bit 3 I/O pin, configurable as LCD segment 4 output; five-volt tolerant with high sink capability. |
| 27 | PE4/LCD_SEG5 | bidirectional | Port E bit 4 I/O pin, configurable as LCD segment 5 output or DAC trigger input; five-volt tolerant with high sink capability. |
| 28 | PE5/LCD_SEG6 | bidirectional | Port E bit 5 I/O pin, configurable as LCD segment 6 output, ADC1 input channel 23, or comparator inputs; five-volt tolerant with high sink capability. |
| 29 | PD0/TIM3_CH2 | bidirectional | Port D bit 0 I/O pin, configurable as Timer 3 channel 2 capture/compare, LCD segment 7 output, ADC1 input channel 22, or comparator input; five-volt tolerant with high sink capability. |
| 30 | PD1/TIM3_ETR | bidirectional | Port D bit 1 I/O pin, configurable as Timer 3 external trigger, LCD common terminal 3, or ADC1 input channel 21; five-volt tolerant with high sink capability. |
| 31 | PD2/TIM1_CH1 | bidirectional | Port D bit 2 I/O pin, configurable as Timer 1 channel 1 capture/compare, LCD segment 8 output, or ADC1 input channel 20; five-volt tolerant with high sink capability. |
| 32 | PD3/TIM1_ETR | bidirectional | Port D bit 3 I/O pin, configurable as Timer 1 external trigger, LCD segment 9 output, or ADC1 input channel 19; five-volt tolerant with high sink capability. |
| 33 | PH4/USART2_RX | bidirectional | Port H bit 4 I/O pin, configurable as USART2 receive input; five-volt tolerant with high sink capability. |
| 34 | PH5/USART2_TX | bidirectional | Port H bit 5 I/O pin, configurable as USART2 transmit output; five-volt tolerant with high sink capability. |
| 35 | PH6/USART2_CK | bidirectional | Port H bit 6 I/O pin, configurable as USART2 synchronous clock or Timer 5 channel 1 capture/compare; five-volt tolerant with high sink capability. |
| 36 | PH7/TIM5_CH2 | bidirectional | Port H bit 7 I/O pin, configurable as Timer 5 channel 2 capture/compare; five-volt tolerant with high sink capability. |
| 37 | VDD3 | power_in | I/O power supply pin; requires 1.65 V to 3.6 V with current up to 80 mA. |
| 38 | VSS3 | power_in | I/O ground connection pin; must be connected to external ground. |
| 39 | PB0/TIM2_CH1 | bidirectional | Port B bit 0 I/O pin with pull-up during reset, configurable as Timer 2 channel 1 capture/compare, LCD segment 10 output, or ADC1 input channel 18; five-volt tolerant with high sink capability. |
| 40 | PB1/TIM3_CH1 | bidirectional | Port B bit 1 I/O pin, configurable as Timer 3 channel 1 capture/compare, LCD segment 11 output, or ADC1 input channel 17; five-volt tolerant with high sink capability. |
| 41 | PB2/TIM2_CH2 | bidirectional | Port B bit 2 I/O pin, configurable as Timer 2 channel 2 capture/compare, LCD segment 12 output, or ADC1 input channel 16; five-volt tolerant with high sink capability. |
| 42 | PB3/TIM2_ETR | bidirectional | Port B bit 3 I/O pin, configurable as Timer 2 external trigger, LCD segment 13 output, or ADC1 input channel 15; five-volt tolerant with high sink capability. |
| 43 | PB4/SPI1_NSS | bidirectional | Port B bit 4 I/O pin with pull-up during reset, configurable as SPI1 master/slave select, LCD segment 14 output, or ADC1 input channel 14; five-volt tolerant with high sink capability. |
| 44 | PB5/SPI1_SCK | bidirectional | Port B bit 5 I/O pin, configurable as SPI1 clock, LCD segment 15 output, or ADC1 input channel 13; five-volt tolerant with high sink capability. |
| 45 | PB6/SPI1_MOSI | bidirectional | Port B bit 6 I/O pin, configurable as SPI1 master-out slave-in, LCD segment 16 output, or ADC1 input channel 12; five-volt tolerant with high sink capability. |
| 46 | PB7/SPI1_MISO | bidirectional | Port B bit 7 I/O pin, configurable as SPI1 master-in slave-out, LCD segment 17 output, or ADC1 input channel 11; five-volt tolerant with high sink capability. |
| 47 | VDD4 | power_in | I/O power supply pin; requires 1.65 V to 3.6 V with current up to 80 mA. |
| 48 | VSS4 | power_in | I/O ground connection pin; must be connected to external ground. |
| 49 | PF0/DAC_OUT1 | bidirectional | Port F bit 0 I/O pin with no protection diode to VDD, configurable as ADC1 input channel 24 or DAC channel 1 output; output only with no input protection. |
| 50 | PF1/DAC_OUT2 | bidirectional | Port F bit 1 I/O pin with no protection diode to VDD, configurable as ADC1 input channel 25 or DAC channel 2 output; output only with no input protection. |
| 51 | PF2/ADC1_IN26 | bidirectional | Port F bit 2 I/O pin with no protection diode to VDD, configurable as ADC1 input channel 26, SPI1 clock, or USART3 synchronous clock; output only with no input protection. |
| 52 | PF3/ADC1_IN27 | bidirectional | Port F bit 3 I/O pin with no protection diode to VDD, configurable as ADC1 input channel 27 or SPI1 master/slave select; output only with no input protection. |
| 53 | PF4/LCD_SEG40 | bidirectional | Port F bit 4 I/O pin, configurable as LCD segment 40 output or LCD common terminal 4; five-volt tolerant with high sink capability. |
| 54 | PF5/LCD_SEG41 | bidirectional | Port F bit 5 I/O pin, configurable as LCD segment 41 output or LCD common terminal 5; five-volt tolerant with high sink capability. |
| 55 | PF6/LCD_SEG42 | bidirectional | Port F bit 6 I/O pin, configurable as LCD segment 42 output or LCD common terminal 6; five-volt tolerant with high sink capability. |
| 56 | PF7/LCD_SEG43 | bidirectional | Port F bit 7 I/O pin, configurable as LCD segment 43 output or LCD common terminal 7; five-volt tolerant with high sink capability. |
| 57 | PD4/TIM1_CH2 | bidirectional | Port D bit 4 I/O pin, configurable as Timer 1 channel 2 capture/compare, LCD segment 18 output, or ADC1 input channel 10; five-volt tolerant with high sink capability. |
| 58 | PD5/TIM1_CH3 | bidirectional | Port D bit 5 I/O pin, configurable as Timer 1 channel 3 capture/compare, LCD segment 19 output, or ADC1 input channel 9; five-volt tolerant with high sink capability. |
| 59 | PD6/TIM1_BKIN | bidirectional | Port D bit 6 I/O pin, configurable as Timer 1 break input, LCD segment 20 output, RTC calibration output, or internal reference voltage output; five-volt tolerant with high sink capability. |
| 60 | PD7/TIM1_CH1N | bidirectional | Port D bit 7 I/O pin, configurable as Timer 1 channel 1 complementary output, LCD segment 21 output, RTC alarm output, or internal reference voltage output; five-volt tolerant with high sink capability. |
| 61 | PG4/LCD_SEG32 | bidirectional | Port G bit 4 I/O pin, configurable as LCD segment 32 output or SPI2 master/slave select; five-volt tolerant with high sink capability. |
| 62 | PG5/LCD_SEG33 | bidirectional | Port G bit 5 I/O pin, configurable as LCD segment 33 output or SPI2 clock; five-volt tolerant with high sink capability. |
| 63 | PG6/LCD_SEG34 | bidirectional | Port G bit 6 I/O pin, configurable as LCD segment 34 output or SPI2 master-out slave-in; five-volt tolerant with high sink capability. |
| 64 | PG7/LCD_SEG35 | bidirectional | Port G bit 7 I/O pin, configurable as LCD segment 35 output or SPI2 master-in slave-out; five-volt tolerant with high sink capability. |
| 65 | PC0/I2C1_SDA | tri_state | Port C bit 0 I/O pin, true open-drain output, configurable as I2C1 serial data line; five-volt tolerant without protection diode. |
| 66 | PC1/I2C1_SCL | tri_state | Port C bit 1 I/O pin, true open-drain output, configurable as I2C1 serial clock line; five-volt tolerant without protection diode. |
| 67 | VDD2 | power_in | I/O power supply pin; requires 1.65 V to 3.6 V with current up to 80 mA. |
| 68 | VSS2 | power_in | I/O ground connection pin; must be connected to external ground. |
| 69 | PC2/USART1_RX | bidirectional | Port C bit 2 I/O pin, configurable as USART1 receive input, LCD segment 22 output, internal reference voltage output, or ADC1 input channel 6; five-volt tolerant with high sink capability. |
| 70 | PC3/USART1_TX | bidirectional | Port C bit 3 I/O pin, configurable as USART1 transmit output, LCD segment 23 output, or ADC1 input channel 5; five-volt tolerant with high sink capability. |
| 71 | PC4/USART1_CK | bidirectional | Port C bit 4 I/O pin, configurable as USART1 synchronous clock, I2C1 SMBus pin, configurable clock output, LCD segment 24 output, or ADC1 input channel 4; five-volt tolerant with high sink capability. |
| 72 | PC5/OSC32_IN | bidirectional | Port C bit 5 I/O pin, configurable as low-speed external crystal oscillator input, SPI1 master/slave select, or USART1 transmit; five-volt tolerant with high sink capability. |
| 73 | PC6/OSC32_OUT | bidirectional | Port C bit 6 I/O pin, configurable as low-speed external crystal oscillator output, SPI1 clock, or USART1 receive; five-volt tolerant with high sink capability. |
| 74 | PC7/LCD_SEG25 | bidirectional | Port C bit 7 I/O pin, configurable as LCD segment 25 output, ADC1 input channel 3, or comparator input; five-volt tolerant with high sink capability. |
| 75 | PE6/LCD_SEG26 | bidirectional | Port E bit 6 I/O pin, configurable as LCD segment 26 output, programmable voltage detector input, or Timer 5 break input; five-volt tolerant with high sink capability. |
| 76 | PE7/LCD_SEG27 | bidirectional | Port E bit 7 I/O pin, configurable as LCD segment 27 output or Timer 5 external trigger input; five-volt tolerant with high sink capability. |
| 77 | PI0/RTC_TAMP1 | bidirectional | Port I bit 0 I/O pin, configurable as RTC tamper 1 detection input, SPI2 master/slave select, or Timer 3 channel 1 capture/compare; five-volt tolerant with high sink capability. |
| 78 | PI1/RTC_TAMP2 | bidirectional | Port I bit 1 I/O pin, configurable as RTC tamper 2 detection input or SPI2 clock; five-volt tolerant with high sink capability. |
| 79 | PI2/RTC_TAMP3 | bidirectional | Port I bit 2 I/O pin, configurable as RTC tamper 3 detection input or SPI2 master-out slave-in; five-volt tolerant with high sink capability. |
| 80 | PI3/SPI2_MISO | bidirectional | Port I bit 3 I/O pin, configurable as SPI2 master-in slave-out or Timer 3 channel 2 capture/compare; five-volt tolerant with high sink capability. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-80(14x14) |
| Category | Embedded Processors & Controllers |
| Pins | 80 |
CAD (KiCad official)
- Symbol:
STM8L152M8T6TR - Footprint:
Package_QFP:LQFP-80_14x14mm_P0.65mm - 3D model: LQFP-80(14x14) (KiCad packages3D, STEP)
- 3D model files:
stm8l152m8t6tr-etched.step/stm8l152m8t6tr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm8l152m8t6tr.step/stm8l152m8t6tr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (147 pp, sha256
193f2133f3d81d2b, retrieved 2026-09-29, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).