Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

3D Model

Open in new tab ↗

Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗

Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗

Loads on click. Unloads only if this page sits in the background.

Datasheet

Open in new tab ↗

Loads on click. Unloads only if this page sits in the background.

Download PDF

Contents

Pinout
Key specifications
CAD (KiCad official)
Provenance

README

markdown

L9396

STMicroelectronics · Power Management - Specialized · TQFP-64-EP(10x10)

L9396 from STMicroelectronics, in a TQFP-64-EP(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	AI4	input	Analog input to ADC converter for external signal measurement in 0.2V to 5V range.
2	AI3	input	Analog input to ADC converter for external signal measurement in 0.2V to 5V range.
3	AI2	input	Analog input to ADC converter for external signal measurement in 0.2V to 5V range.
4	AI1	input	Input 1 to select VCORE regulator function via pull-down configuration at power-up.
5	AI0	input	Input 0 to select VCORE regulator function via pull-down configuration at power-up.
6	RSUL0	input	WSS ground return and current sink for wheel speed sensor channel 0; used for low-side current measurement and open/short diagnostics.
7	RSUH0	power_out	WSS regulated output for wheel speed sensor channel 0 or tracking regulator supply tracking VCC/VCC5 rail.
8	RSUL1	input	WSS ground return and current sink for wheel speed sensor channel 1; used for low-side current measurement and open/short diagnostics.
9	RSUH1	power_out	WSS regulated output for wheel speed sensor channel 1 or tracking regulator supply tracking VCC/VCC5 rail.
10	RSUL2	input	WSS ground return and current sink for wheel speed sensor channel 2; used for low-side current measurement and open/short diagnostics.
11	RSUH2	power_out	WSS output for wheel speed sensor channel 2 with integrated current limiting and short-to-battery protection.
12	RSUL3	input	WSS ground return and current sink for wheel speed sensor channel 3; used for low-side current measurement and open/short diagnostics.
13	RSUH3	power_out	WSS output for wheel speed sensor channel 3 with integrated current limiting and short-to-battery protection.
14	GNDA	power_in	Analog ground reference for all analog circuit blocks and voltage comparators.
15	GPOD0	output	GPO driver low-side output drain terminal with programmable PWM control and ON/OFF capability; sinks up to 145mA with current limiting.
16	PDI	input	Motor pump high-side FET logic input for fail-safe control of external pump motor driver.
17	PRI	input	Motor pump recirculation FET logic input for fail-safe control of external recirculation path.
18	PRG	output	Motor pump recirculation FET gate drive output floating to PRS with 15-35mA source and sink capability.
19	PRS	input	Motor pump recirculation FET source pin connection for floating gate drive reference.
20	PDG	output	Motor pump high-side FET gate drive output floating to PDS with 15-35mA source and sink capability and integrated diagnostics.
21	PDS	input	Motor pump high-side FET source pin connection for floating gate drive reference; internal pull-up for diagnostics.
22	PDBATT	input	Battery sense input for motor pump high-side FET pre-driver drain-source monitoring and over-current detection.
23	VB_SW	output	Battery protected switch output providing switched battery voltage to external loads up to 150mA; controlled via SPI with over-current shutdown.
24	VB	power_in	Battery line input from 4.5V to 19V with integrated protection against load-dump transients and over-voltage.
25	VDBATT	input	Battery sense input for fail-safe FET pre-driver drain-source voltage monitoring and over-current detection.
26	VDG	output	Fail-safe FET gate drive output floating to VDS with 1-2mA source and 5-9mA sink capability.
27	VDS	input	Fail-safe FET source pin connection for floating gate drive reference and drain-source monitoring.
28	WDTDIS	input	Watchdog timer disable input; when driven high (>1.75V), disables WD2 timer and resets watchdog counter.
29	VBM	input	Battery voltage measurement sense input with 10:1 divider ratio for ADC monitoring of battery rail.
30	IGN	input	Wake-up input pin for battery connection detection; rising edge >3.5V triggers power-up sequence with 0.1V/µs minimum slew rate.
31	VCOREFDBK	input	VCORE voltage feedback input for external voltage divider providing 0.8V reference with ±3% typical accuracy.
32	VCORE	power_out	Microcontroller core voltage supply output from 0.8V to 5V; configurable via external resistor divider and AI0/AI1 inputs.
33	SCORE	bidirectional	Source pin for external VCORE buck/linear regulator FET with bootstrap capacitor connection for gate drive.
34	GCORE	bidirectional	Gate control output for external VCORE regulator FET with integrated pull-down and voltage clamp to 8-12V.
35	CBS	bidirectional	Bootstrap capacitor connection terminal for VCORE gate drive circuitry; 100nF external capacitor recommended.
36	I_CORE_SL	input	Shunt resistor low-side input for VCORE current sensing and over-current detection in linear mode operation.
37	I_CORE_SH	input	Shunt resistor high-side input for VCORE current sensing and over-current detection in buck/linear mode operation.
38	VCC	power_out	Microcontroller I/O supply output configurable to 3.3V or 5V via VCCSEL input pin; 100mA maximum load.
39	VCC5	power_out	Fixed 5V microcontroller I/O and ADC supply output with 250mA maximum load and integrated thermal protection.
40	VPREREG	power_out	Integrated buck pre-regulator output providing 6.5V or 7.2V (selectable via SPI) with 1A maximum current capability.
41	VCCSEL	input	Voltage selection input for VCC regulator configuration; high selects 5V, low selects 3.3V (latched at power-up).
42	BCKSW	output	Switched pre-regulator output node for external buck LC filter; connects internal high-side FET switch to external inductor.
43	VBST	power_in	Device internal battery/boost supply rail from 6V to 19V; connects to VB directly when boost disabled or boost regulator output when enabled.
44	CP	power_out	Charge pump high-voltage output supplying gate drive circuits with 8.9-11V typical output for VBST >8.55V.
45	VC4	passive	Charge pump second-stage capacitor high terminal; external 68nF switching capacitor required.
46	VC3	passive	Charge pump second-stage capacitor low terminal; external 68nF switching capacitor required.
47	VC2	passive	Charge pump first-stage capacitor high terminal; external 68nF switching capacitor required.
48	VC1	passive	Charge pump first-stage capacitor low terminal; external 68nF switching capacitor required.
49	RESET	output	Active-low reset output driven from SSM_RESET state machine; open-drain output with external 5kΩ pull-up recommended.
50	FSN	output	Fail-safe negated output; active-low signal indicating device fail-safe mode due to voltage, thermal, or watchdog faults.
51	BSTSW	output	Switched boost regulator output node connecting internal boost FET to external inductor for 9V boost regulation.
52	GNDBST	power_in	Boost regulator ground reference isolated from digital/analog grounds; return path for boost switch and inductor.
53	NU	input	Not used pin; must be connected to ground voltage for proper IC operation and ESD protection.
54	GNDD	power_in	Digital logic ground reference with protection against ground loss; minimum threshold 300mV above GNDA triggers reset.
55	SDO	output	SPI data output providing 32-bit response frames with 3-bit CRC at up to 6MHz clock frequency.
56	SDI	input	SPI data input accepting 32-bit command frames with 3-bit CRC at up to 6MHz clock frequency.
57	CLK	input	SPI serial clock input up to 6MHz; timing controlled by master microcontroller.
58	PRN	input	Microcontroller clock signal input for WD2 second watchdog frequency validation at 91Hz to 1500Hz selectable range.
59	CS	input	SPI chip select active-low input; enables SDI/SDO communication when driven low during 32-bit frame transfer.
60	WSO0	output	WSS pass-through output channel 0; digital output of decoded wheel speed sensor data or test patterns.
61	WSO1	output	WSS pass-through output channel 1; digital output of decoded wheel speed sensor data or test patterns.
62	WSO2	output	WSS pass-through output channel 2; digital output of decoded wheel speed sensor data or test patterns.
63	WSO3	output	WSS pass-through output channel 3; digital output of decoded wheel speed sensor data or test patterns.
64	FAULT	output	General fault output; push-pull digital output indicating watchdog errors or configurable fault/thermal conditions; enabled only after power-up completion.
65	EP	passive	Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter	Value
Manufacturer	STMicroelectronics
Package	TQFP-64-EP(10x10)
Category	Power Management (PMIC)
Pins	65

CAD (KiCad official)

Symbol: L9396
Footprint: Package_QFP:TQFP-64-1EP_10x10mm_P0.5mm_EP5.305x5.305mm
3D model: TQFP-64-EP(10x10) (KiCad packages3D, STEP)
3D model files: l9396-etched.step / l9396-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); l9396.step / l9396.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: STMicroelectronics datasheet (109 pp, sha256 f657f672d1da9fef, retrieved 2026-09-23, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF