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Contents

README

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HX81487-S

ZHHXDZ · RS-485 / RS-422 ICs · SOP-8

HX81487-S from ZHHXDZ, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RO output Receiver data output; RO goes high when A-B is at or above -50 mV and low at or below -200 mV, and is high-impedance when RE is high.
2 RE input Receiver output enable, active low: the receiver output is enabled when RE is low and goes high-impedance when RE is high.
3 DE input Driver output enable: when DE is high the chip operates in transmit state, and when DE is low (with RE high) the driver outputs A and B are high-impedance.
4 DI input Driver data input; with DE high, a high DI drives A high and B low, and a low DI drives A low and B high.
5 GND power_in Ground reference for the device; all voltages are referenced to ground.
6 A bidirectional Driver differential output and receiver data input (non-inverting line); bus input range is -7 V to +12 V common mode, and input current is limited to ±2 µA per the DC table.
7 B bidirectional Driver differential output and receiver data input (inverting line); bus input range is -7 V to +12 V common mode, and input current is limited to ±2 µA per the DC table.
8 VCC power_in Power supply, 4.5 V to 5.5 V (5 V ±5%), with absolute maximum of +6.0 V.

Key specifications

Parameter Value
Manufacturer ZHHXDZ
Package SOP-8
Category Interface
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Working voltage range (Vcc) Vcc 4.5 5.5 V Vcc=5V±5%, TA=25℃ 2
Driver differential output VOD1 1.5 V R=54Ω or R=27Ω, Figure 1 2
Receiver differential input threshold voltage VTH -200 -50 mV -7V ≤ VCM ≤ +12V 2
Input high voltage VIH 2 V DE, RE, DI 2
Input low voltage VIL 0.8 V DE, RE, DI 2
Receiver output high level VOH 4 V IO=-8mA 2
Receiver output low level VOL 0.4 V IO=8mA 2
Receiver output leakage current (tri-state) IOZR 1 uA 0.4V ≤ Vo ≤ 2.4V 2
Receiver input impedance RIN 96 kΩ -7V ≤ VCM ≤ +12V 2
Input current (DE, RE, DI) IIN1 -2 2 uA DE, RE, DI 2
Input current (A, B) IIN2 40 90 uA DE=0V, Vcc=5V 2
Input current (A, B) IIN2 60 100 uA VIN=0V 2
No load operating current ICC 480 600 uA DE=Vcc, RE=DI=GND or Vcc 2
No load operating current ICC 450 600 uA DE=GND, RE=DI=GND or Vcc 2
Receiver output short-circuit current IOSR 95 mA 0V ≤ VRO ≤ Vcc 2
Driver differential output change (DI changes) ΔVOD 0.2 V R=54Ω or R=27Ω, Figure 1 2
Driver common mode output voltage change ΔVOC 0.2 V R=54Ω or R=27Ω, Figure 1 2
Driver common mode output voltage VOC 3 V R=54Ω or R=27Ω, Figure 1 2
Differential receiver offset / threshold change ΔVTH 25 mV 2
ESD protection, human body model between A/B ESD HBM -15 15 kV Between A/B, human body model 2
Driver input to output (rising) tDPLH 60 nS RDIFF=50Ω, CL1=CL2=100pF, Figure 3,5 2
Driver input to output (falling) tDPHL 60 nS RDIFF=50Ω, CL1=CL2=100pF, Figure 3,5 2
Driver output offset tDPLH, tDPHL -2.5 nS RDIFF=50Ω, CL1=CL2=100pF, Figure 3,5 2
Differential driver skew tDSKEW -10 10 nS RDIFF=50Ω, CL1=CL2=100pF, Figure 3,5 2
Drive rise time tDR 25 nS 2
Drive fall time tDF 25 nS 2
Driver enables high output tDZH 150 nS CL=100pF, Figure 4,6, S2 closed 2
Driver enables output to be low tDZL 150 nS CL=100pF, Figure 4,6, S1 closed 2
Drive from high to off tDLZ 100 nS CL=15pF, Figure 4,6, S1 closed 2
Drive from low to off tDHZ 100 nS CL=15pF, Figure 4,6, S2 closed 2
Receiver input to output (low to high) tRPLH 150 nS /VID/ ≥ 2.0V, rise/fall time ≤ 15nS, Figure 7,9 2
Receiver input to output (high to low) tRPHL 150 nS /VID/ ≥ 2.0V, rise/fall time ≤ 15nS, Figure 7,9 2
Differential receiver skew tRSKEW -10 0 10 nS 2
Receiver enable to output low tRZL 20 50 nS CL=100pF, Figure 2,8 2
Receiver enable to output high tRZH 20 50 nS CL=100pF, Figure 2,8 2
Receiver from low to off tRLZ 20 50 nS CL=100pF, Figure 2,8 2
Receiver from high to off tRHZ 20 50 nS CL=100pF, Figure 2,8 2
Maximum data speed fMAX 10 Mbps 1
Supply voltage VCC -0.5 6 V 2
Control input voltage (DE, RE) DE, RE 6 V 2
Driver input voltage (DI) DI 6 V 2
Drive output voltage / receive input voltage (A, B) A, B -7 12 V 2
Receiving output voltage (RO) RO -0.3 V Max printed as VCC+0.3 2
Storage temperature range TSTG -55 150 ℃ 2
Maximum operating temperature range TMOP -55 125 ℃ 2
Power dissipation PD 470 mW SOP-8 (+70℃ or above) 2
Solder temperature TL 300 ℃ 10 seconds 2
Operating temperature range TOP -40 85 ℃ 2

CAD (KiCad official)

  • Symbol: HX81487-S
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: hx81487-s-etched.step / hx81487-s-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); hx81487-s.step / hx81487-s.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: ZHHXDZ datasheet (4 pp, sha256 da7112da55b7cfbe, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF