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74CBTLV3245PW
Public Made by Adomby adom
Nexperia Signal Switches, Multiplexers, Decoders, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdown74CBTLV3245PW
Nexperia · Signal Switches, Multiplexers, Decoders · TSSOP-20
74CBTLV3245PW from Nexperia, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | n.c. | unconnected | Not connected; leave this pin unconnected. |
| 2 | A1 | bidirectional | Data input/output on the A port; the A-to-B switch is closed when OE is LOW and high-impedance when OE is HIGH, with VSW limited to 0 V to VCC. |
| 3 | A2 | bidirectional | Data input/output on the A port; the A-to-B switch is closed when OE is LOW and high-impedance when OE is HIGH, with VSW limited to 0 V to VCC. |
| 4 | A3 | bidirectional | Data input/output on the A port; the A-to-B switch is closed when OE is LOW and high-impedance when OE is HIGH, with VSW limited to 0 V to VCC. |
| 5 | A4 | bidirectional | Data input/output on the A port; the A-to-B switch is closed when OE is LOW and high-impedance when OE is HIGH, with VSW limited to 0 V to VCC. |
| 6 | A5 | bidirectional | Data input/output on the A port; the A-to-B switch is closed when OE is LOW and high-impedance when OE is HIGH, with VSW limited to 0 V to VCC. |
| 7 | A6 | bidirectional | Data input/output on the A port; the A-to-B switch is closed when OE is LOW and high-impedance when OE is HIGH, with VSW limited to 0 V to VCC. |
| 8 | A7 | bidirectional | Data input/output on the A port; the A-to-B switch is closed when OE is LOW and high-impedance when OE is HIGH, with VSW limited to 0 V to VCC. |
| 9 | A8 | bidirectional | Data input/output on the A port; the A-to-B switch is closed when OE is LOW and high-impedance when OE is HIGH, with VSW limited to 0 V to VCC. |
| 10 | GND | power_in | Ground (0 V) reference for all voltages on the device. |
| 11 | B8 | bidirectional | Data input/output on the B port; the B-to-A switch is closed when OE is LOW and high-impedance when OE is HIGH, with VSW limited to 0 V to VCC. |
| 12 | B7 | bidirectional | Data input/output on the B port; the B-to-A switch is closed when OE is LOW and high-impedance when OE is HIGH, with VSW limited to 0 V to VCC. |
| 13 | B6 | bidirectional | Data input/output on the B port; the B-to-A switch is closed when OE is LOW and high-impedance when OE is HIGH, with VSW limited to 0 V to VCC. |
| 14 | B5 | bidirectional | Data input/output on the B port; the B-to-A switch is closed when OE is LOW and high-impedance when OE is HIGH, with VSW limited to 0 V to VCC. |
| 15 | B4 | bidirectional | Data input/output on the B port; the B-to-A switch is closed when OE is LOW and high-impedance when OE is HIGH, with VSW limited to 0 V to VCC. |
| 16 | B3 | bidirectional | Data input/output on the B port; the B-to-A switch is closed when OE is LOW and high-impedance when OE is HIGH, with VSW limited to 0 V to VCC. |
| 17 | B2 | bidirectional | Data input/output on the B port; the B-to-A switch is closed when OE is LOW and high-impedance when OE is HIGH, with VSW limited to 0 V to VCC. |
| 18 | B1 | bidirectional | Data input/output on the B port; the B-to-A switch is closed when OE is LOW and high-impedance when OE is HIGH, with VSW limited to 0 V to VCC. |
| 19 | OE | input | Active-LOW output enable input with Schmitt-trigger action; LOW connects An to Bn, HIGH disables all switches (high-impedance). |
| 20 | VCC | power_in | Positive supply voltage, 2.3 V to 3.6 V recommended operating range. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | TSSOP-20 |
| Category | Logic |
| Pins | 20 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | -0.5 | 4.6 | V | 3 | ||
| Input voltage | VI | -0.5 | 4.6 | V | 3 | ||
| Switch voltage | VSW | -0.5 | V | enable and disable mode | 3 | ||
| Input clamping current | IIK | -50 | mA | VI < -0.5 V | 3 | ||
| Switch clamping current | ISK | -50 | mA | VI < -0.5 V | 3 | ||
| Switch current | ISW | -128 | 128 | mA | VSW = 0 V to VCC | 3 | |
| Supply current | ICC | 100 | mA | 3 | |||
| Ground current | IGND | -100 | mA | 3 | |||
| Storage temperature | Tstg | -65 | 150 | °C | 3 | ||
| Total power dissipation | Ptot | 500 | mW | Tamb = -40 °C to +125 °C | 3 | ||
| Supply voltage | VCC | 2.3 | 3.6 | V | 3 | ||
| Input voltage | VI | 0 | 3.6 | V | 3 | ||
| Switch voltage | VSW | 0 | V | enable and disable mode | 3 | ||
| Ambient temperature | Tamb | -40 | 125 | °C | 3 | ||
| Input transition rise and fall rate | Δt/ΔV | 200 | ns/V | VCC = 2.3 V to 3.6 V; applies to control signal levels | 3 | ||
| HIGH-level input voltage | VIH | 1.7 | V | VCC = 2.3 V to 2.7 V | 4 | ||
| HIGH-level input voltage | VIH | 2 | V | VCC = 3.0 V to 3.6 V | 4 | ||
| LOW-level input voltage | VIL | 0.7 | V | VCC = 2.3 V to 2.7 V | 4 | ||
| LOW-level input voltage | VIL | 0.9 | V | VCC = 3.0 V to 3.6 V | 4 | ||
| Input leakage current | II | -20 | 20 | μA | pin OE; VI = GND to VCC; VCC = 3.6 V | 4 | |
| OFF-state leakage current | IS(OFF) | -20 | 20 | μA | VCC = 3.6 V; see Fig. 3 | 4 | |
| ON-state leakage current | IS(ON) | -20 | 20 | μA | VCC = 3.6 V; see Fig. 4 | 4 | |
| Power-off leakage current | IOFF | -50 | 50 | μA | VI or VO = 0 V to 3.6 V; VCC = 0 V | 4 | |
| Supply current | ICC | 50 | μA | VI = GND or VCC; IO = 0 A; VSW = GND or VCC; VCC = 3.6 V | 4 | ||
| Additional supply current | ΔICC | 2000 | μA | pin OE; VI = VCC - 0.6 V; VSW = GND or VCC; VCC = 3.6 V; one input at 3 V, other inputs at VCC or GND | 4 | ||
| ON resistance | RON | 15 | Ω | VCC = 2.3 V to 2.7 V; ISW = 64 mA; VI = 0 V | 5 | ||
| ON resistance | RON | 60 | Ω | VCC = 2.3 V to 2.7 V; ISW = 15 mA; VI = 1.7 V | 5 | ||
| ON resistance | RON | 11 | Ω | VCC = 3.0 V to 3.6 V; ISW = 64 mA; VI = 0 V | 5 | ||
| ON resistance | RON | 25.5 | Ω | VCC = 3.0 V to 3.6 V; ISW = 15 mA; VI = 2.4 V | 5 | ||
| Propagation delay | tpd | 0.2 | ns | An to Bn or Bn to An; see Fig. 12; VCC = 2.3 V to 2.7 V | 8 | ||
| Propagation delay | tpd | 0.31 | ns | An to Bn or Bn to An; see Fig. 12; VCC = 3.0 V to 3.6 V | 8 | ||
| Enable time | ten | 1 | 8 | ns | OE to An or Bn; see Fig. 13; VCC = 2.3 V to 2.7 V | 8 | |
| Enable time | ten | 1 | 7 | ns | OE to An or Bn; see Fig. 13; VCC = 3.0 V to 3.6 V | 8 | |
| Disable time | tdis | 1 | 8 | ns | OE to An or Bn; see Fig. 13; VCC = 2.3 V to 2.7 V | 8 | |
| Disable time | tdis | 1 | 8.5 | ns | OE to An or Bn; see Fig. 13; VCC = 3.0 V to 3.6 V | 8 | |
| Derating of total power dissipation above 100 °C | Ptot | 10 | mW/K | SOT360-1 (TSSOP20) package; derates linearly above 100 °C | 3 |
CAD (KiCad official)
- Symbol:
74CBTLV3245PW - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files:
74cbtlv3245pw-etched.step/74cbtlv3245pw-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74cbtlv3245pw.step/74cbtlv3245pw.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nexperia datasheet (16 pp, sha256
70db965e987e7eb6, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).