Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

SGM2019-3.3YC5G

SGMICRO · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SC-70-5

SGM2019-3.3YC5G from SGMICRO, in a SC-70-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN power_in Regulator input; the supply voltage can range from 2.5V to 5.5V and the pin should be bypassed with a 1μF capacitor to GND.
2 GND power_in Ground reference pin for the regulator.
3 EN input Shutdown input; a logic low reduces the supply current to 10nA, and the pin should be connected to IN for normal operation.
4 BP/FB passive On this fixed 3.3V version the pin is the reference-noise bypass (BP), where a low-leakage 0.01μF ceramic capacitor reduces output noise; the FB function used to set the output voltage applies only to the adjustable version.
5 OUT power_out Regulator output; for VOUT above 2V in the SC70-5 package the maximum output current is 250mA.

Key specifications

Parameter Value
Manufacturer SGMICRO
Package SC-70-5
Category Power Management (PMIC)
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Voltage VIN 2.5 5.5 V +25℃ 3
Output Voltage Accuracy -2.5 2.5 % IOUT = 0.1mA, +25℃ 3
Current Limit ILIM 310 500 mA +25℃ 3
Dropout Voltage 270 400 mV IOUT = 300mA, +25℃ 3
Line Regulation ΔVLNR 0.02 0.05 %/V VIN = 2.5V or (VOUT + 0.5V) to 5.5V, IOUT = 1mA, +25℃ 3
Load Regulation ΔVLDR 0.002 0.005 %/mA IOUT = 0.1mA to 300mA, COUT = 1µF, VOUT > 2V, +25℃ 3
EN Input Threshold High VIH 1.5 V VIN = 2.5V to 5.5V, VEN = -0.3V to VIN, Full 3
EN Input Threshold Low VIL 0.3 V VIN = 2.5V to 5.5V, VEN = -0.3V to VIN, Full 3
EN Input Bias Current IB(SHDN) 0.01 1 µA EN = 0V or EN = 5.5V, +25℃ 3
Ground Pin Current IQ 100 200 µA No load, EN = 2V, +25℃ 3
Maximum Output Current 250 mA VOUT > 2V, SC70-5, +25℃ 3
Dropout Voltage 0.9 mV IOUT = 1mA 3
Output Voltage Noise en 30 µVRMS f = 10Hz to 100kHz, CBP = 0.01µF, COUT = 10µF, +25℃ 3
Power Supply Rejection Ratio PSRR 77 dB f = 217Hz, +25℃ 3
Power Supply Rejection Ratio PSRR 74 dB CBP = 0.1μF, ILOAD = 50mA, COUT = 1μF, VIN = VOUT+1V, f = 1kHz, +25℃ 3
Shutdown Supply Current IQ(SHDN) 0.01 µA EN = 0.4V, Full 3
Shutdown Exit Delay 30 µs CBP = 0.01μF, COUT = 1μF, No Load, +25℃ 3
Thermal Shutdown Temperature TSHDN 150 ℃ 3
Thermal Shutdown Hysteresis ΔTSHDN 15 ℃ 3
IN to GND VIN -0.3 6 V 2
Power Dissipation SC70-5 PD 0.3 W TA = 25℃ 2
Junction Temperature TJ 150 ℃ 2
Storage Temperature Range TSTG -65 150 ℃ 2
ESD Susceptibility HBM 4000 V HBM 2
ESD Susceptibility MM 400 V MM 2
Operating Temperature Range TA -40 85 ℃ 2

CAD (KiCad official)

  • Symbol: SGM2019-3.3YC5G
  • Footprint: Package_TO_SOT_SMD:SOT-353_SC-70-5
  • 3D model: SC-70-5 (KiCad packages3D, STEP)
  • 3D model files: sgm2019-3-3yc5g-etched.step / sgm2019-3-3yc5g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sgm2019-3-3yc5g.step / sgm2019-3-3yc5g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: SGMICRO datasheet (16 pp, sha256 76412693dc3f9952, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF